Join a team that's shaping the future of high-performance ASIC design. Collaborate with experts to execute complex physical design tasks, gaining hands-on experience in cutting-edge technologies and tools for next-gen networking and AI/ML applications.

Unlock potential by driving design implementation for timing closure and PPA metrics. Collaborate on advanced methodologies and tools to ensure high-quality silicon delivery while working in a dynamic, global team environment.

Unlock potential by driving design implementation for advanced ASIC/SoC projects. Collaborate on timing closure, physical verification, and optimization to achieve top-tier performance metrics in a dynamic, global environment.

Reimagine the future of high-performance ASIC design by leading complex physical design tasks, from floorplanning to signoff, utilizing cutting-edge tools and advanced technology nodes to drive innovation in networking and AI/ML applications.

Drive design implementation for advanced ASIC/SoC projects, focusing on place and route, timing closure, and physical verification. Collaborate with global teams to achieve optimal PPA metrics and ensure high-quality silicon delivery.