Engineer cutting-edge ASIC verification solutions, collaborating with design teams to create robust testbenches and verification plans. Drive quality assurance and coverage metrics to ensure successful silicon outcomes across diverse products.

Unlock the potential of cutting-edge ASIC products by designing and implementing advanced verification infrastructures. Collaborate with design teams to ensure first-pass silicon success through comprehensive verification strategies and robust testbenches.

Engineer advanced ASIC emulation and verification processes, bridging simulation and hardware acceleration. Collaborate with teams to optimize designs on Cadence Palladium, ensuring efficient pre-silicon verification and debugging.

Lead the charge in DFT programs, from specification to production, ensuring optimal test coverage and yield improvement. Collaborate with cross-functional teams to innovate solutions for advanced ASIC designs and enhance product reliability.

Join a dynamic team to drive DFT initiatives from specification to production, enhancing SoC designs through innovative testing strategies and collaboration with cross-functional teams to ensure product excellence and customer satisfaction.