Lead and manage defensive patent litigation efforts, overseeing strategy and team coordination across U.S. and international legal matters, while aligning with business goals and fostering collaboration across various internal functions.

Lead the charge in designing cutting-edge PCIe subsystems as a senior RTL design engineer. Collaborate across teams to deliver high-quality RTL and ensure successful SoC integration, while mentoring peers and driving innovation in development.

Lead and mentor a team of debug engineers, driving server/rack hardware solutions for customer deployments while managing escalations and fostering cross-functional collaboration to ensure timely project success.

Shape the future of adaptive SoC architecture, driving innovative solutions for diverse applications through collaboration with cross-functional teams and customers.

Take ownership of designing and implementing scalable interconnect solutions, optimizing high-speed communication for diverse products. Collaborate with cross-functional teams to deliver performance-driven hardware in a dynamic environment.