5-7 years of experience in computer architecture or related field
Expertise in bus/network protocols like PCIe, CXL, and InfiniBand
Strong background in computer science fundamentals
Experience in high bandwidth and low latency computing systems
Leadership experience in architectural design and implementation projects
Familiarity with AI and big data technologies
Effective communication and strategic planning skills
Responsibilities
Conduct comprehensive analysis of cutting-edge bus technologies
Develop long-term technology roadmaps and strategic plans
Build competitive bus architectures for AI and computing scenarios
Implement innovative system-level solutions focused on bus architecture
Drive collaboration between chip design and software solutions
Lead the continuous evolution of bus technology
Benefits
Flexible working hours
Opportunity for professional development and training
Access to advanced technology and resources
Dynamic team-oriented environment
Opportunity to influence the future of computing technologies
Full Job Description
Conduct in-depth insight and analysis of industry cutting-edge bus architectures and technologies, develop long-term technology plans and roadmaps, and lead technical decision-making.
Build competitive bus architectures and interconnection protocols for AI/general computing scenarios, in align with mainstream architectures and protocols in the industry. Drive the continuous evolution of bus technology, ensuring an industry-leading competitive edge of large-scale computing cluster solutions.
Deeply understand the chip architecture and software framework. Implement system-level innovative solutions centered around bus architecture and protocols. Drive co-innovation across chip design, hardware/software, and solutions to ensure business success.
About the ideal candidate:
Solid foundational knowledge in computer science and computer architecture. In-depth knowledge of bus/network protocols such as PCIe, CXL, and InfiniBand. Familiarity with technologies related to in-order delivery, congestion, retransmission, multipath, flow control, QoS, network measurement, fault tolerance, and reliability. Experience in architecture design and R&D is preferred in scenarios such as high bandwidth, low latency, and homogeneous/heterogeneous computing interconnection.
Familiarity with AI large model training, big data, search and push, distributed database, and other application scenarios. Experience in large-scale computing cluster architecture design, hardware-software co-optimization for performance, and relevant implementation outcomes are preferred.
Experience in leading the planning, architecture design, and implementation of relevant chips or products.
Strategic vision and technical leadership, with strong communication skills and good insight.
