In this role, the candidate will be reporting to the VP of Engineering. This is a full-time leadership position as an individual contributor. You will architect highly reputed, high-performance, cutting-edge memory controllers for data centers and AI applications. This is a fast-growing market with high demand from tier-1 customers which gives ample opportunity for innovation and differentiation. If you like challenges and want to make a technical difference in the memory landscape during these exciting times in the semiconductor industry, this is the right opportunity for you.

Location can be flexible for the right candidate. San Jose, California or Hillsboro, Oregon, US are preferred. Rambus offers a flexible work environment, embracing a hybrid approach for most of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

• Own the architecture specification for Rambus memory controllers
• Work closely with product management, product marketing, technical field organization and customers to understand feature priorities and market needs.
• Work closely with logic design, verification and physical design teams to define implementation-friendly, high performance and PPA optimized products and realistic timelines.
• Actively drive technical reviews including implementation review, verification review, PRD/ERD review
• Represent the Rambus SIP team at JEDEC standards body
• Work closely with system modeling team to explore and finalize next generation architectures
• Collaborate with Rambus Labs research team to incorporate innovative and differentiated features to establish clear leadership.
• Protect Rambus innovations through patent disclosures
• Act as the technical expert to provide architectural solutions to customers to grow Rambus SIP memory business
• Evangelization of Rambus memory controller products through technical publications and industry events
• Empower field teams through product training in collaboration with marketing and product management teams

• BS/MS with 20+ years9 experience in semiconductor industry, with at least 10 years on memory logic design and/or architecture. IP experience is preferred.
• Hands-on experience with RTL coding, logic design, physical design and DV techniques.
• Knowledge of HBM, LPDDR and AXI protocols and controllers. GDDR and CHI protocol knowledge will be a plus.
• Knowledge of front-end ASIC development flow and best practices

• Knowledge of system architecture for HPC and AI systems, including impact to memory controller architecture
• Strong verbal and written communication skills and the ability to work in a fast-paced environment
• Excellent soft skills and collaborative mindset to work with cross functional teams
• Ability to make timely decisions based on available data
• Technical presales experience is desirable
• This role involves deep technical skills and domain expertise while also requiring excellent soft skills
• Ability to travel to Rambus sites as well as customer locations as required

Rambus offers a competitive compensation packageincludingbase salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.

TheUSsalary range for thisfull-timeposition is $189,700to $352,300.Our salary ranges aredeterminedby role,leveland location. The successful candidate9 starting pay will bedeterminedbased on job-related skills, experience, qualifications, worklocationand market conditions.

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