Role description

SystemC Modeling Developer

Lead II - Embedded Software

UST is searching for a skilled SystemC Modeling Developer to join our Server Architecture & Performance Engineering team. In this role, you will design and develop SystemC/TLM models for next-generation Compute and AI server platforms, enabling architecture exploration, performance analysis, and pre-silicon software development. This is a high-impact opportunity to directly influence future server SOC and platform designs.

The opportunity:
• Develop SystemC/TLM2.0-based functional, timing, and performance models for server subsystems (CPU, memory, I/O, accelerators, AI engines).
• Build modular, scalable models for Compute & AI workloads and integrate them into simulation frameworks.
• Perform system-level performance modeling, profiling, and bottleneck analysis across compute, memory, and accelerator paths.
• Support pre-silicon BIOS, firmware, and driver enablement using virtual platforms.
• Validate models against RTL or hardware references to ensure functionality and accuracy.
• Work with simulators such as Synopsys Virtualizer, Cadence VSP, QEMU-based frameworks, etc.
• Collaborate with architects, RTL designers, platform engineers, and performance teams to align modeling results with product goals.

This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

What you need:
• Strong hands-on experience with SystemC, TLM2.0, and C/C++.
• Solid understanding of computer architecture including CPU pipelines, cache hierarchy, memory controllers, PCIe/CXL, and AI/compute subsystems.
• Experience in cycle-accurate, timing-accurate, or transaction-level modeling.
• Knowledge of pre-silicon simulation flows and virtual platform development.
• Ability to analyze performance data, interpret system behavior, and provide optimization insights.
• Strong debugging skills in complex simulation environments.
• Desired Skills:
• Experience modeling AI/ML accelerators, GPUs, or heterogeneous compute units.
• Familiarity with server-class SoC architectures (x86, ARM, RISC-V).
• Exposure to firmware/BIOS bring-up using virtual models.
• Knowledge of RTL design (SystemVerilog) or hardware emulation (optional).
• Experience with performance tools, trace-driven analysis, or workload modeling.
• Understanding of high-speed interfaces (PCIe, CXL, NVMe, Ethernet).
• Qualification:
• Bachelor s or Master s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• 8+ years of experience in SystemC/TLM modeling, pre-silicon simulation, or architectural modeling for semiconductor/server platforms.

Compensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.

Role Location: Remote-US

Compensation Range: $80,000-$120,000

Benefits

Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company's 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.

Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) Retirement Plan with employer matching.

Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.

Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).

All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.