Position OverviewWe are seeking an experienced Substrate Layout Design Engineer to own the physical layout and routing of large, high-density, multi-die organic packages and modules, and their associated high-speed interface boards. The role spans early routing feasibility through manufacturing release and includes high-speed serial interfaces, clock and control signals, and high-current power delivery within demanding electrical, mechanical, and fabrication constraints.
The successful candidate will work closely with package integration, ASIC, signal integrity, power integrity, mechanical, system, and manufacturing teams. This position requires strong hands-on layout capability, sound engineering judgment, and the ability to work directly with foundry, substrate, assembly, board-fabrication, and contract manufacturing partners.
Responsibilities - Own end-to-end physical layout of advanced organic substrates using Siemens Xpedition, Cadence Allegro, including die and component placement, bump map and netlist alignment, escape and breakout routing, via planning, reference planes, and layer stack-up implementation.
- Perform early routing-feasibility studies using die floorplans, I/O placement, package and board interfaces, mechanical keep-out zones, manufacturing rules, and system level constraints; identify bottlenecks and recommend floorplan, bump map, or stack-up changes.
- Implement high speed serial and differential routing with controlled impedance, length and skew management, crosstalk control, via-transition optimization, and continuous return paths in accordance with SI requirements.
- Route clock, control, management, and other low-speed interfaces while meeting topology, shielding, isolation, and reference plane requirements.
- Develop robust power and ground distribution for high power devices and voltage regulation interfaces, including plane allocation, current density management, via arrays, and implementation of PI constraints.
- Support package-to-board co-design and layout of high speed interface boards, including connector and component placement, signal breakout, power delivery, and mechanical alignment with the package or module.
- Integrate fine pitch interconnect regions and embedded or integrated passive structures while observing electrical, mechanical, thermal, and supplier specific design rules.
- Build and maintain layout constraints, technology files, libraries, design documentation, revision control, and ECO implementation throughout the design cycle.
- Run and resolve DRC, connectivity, DFM, and manufacturing rule checks; prepare complete release packages, drawings, reports, and design databases.
- Lead layout reviews and work directly with foundries, substrate suppliers, OSATs, PCB fabricators, and contract manufacturers to resolve manufacturability issues and drive designs to release.
Minimum Qualifications- 8+ years of hands-on experience in advanced IC package substrate layout, with substantial experience in high-performance organic substrates.
- Demonstrated experience with multi-die or chiplet-based packages, high I/O counts, fine-pitch bump escape, dense routing, and constrained layer stack-ups.
- Strong hands-on proficiency with Siemens Xpedition for package or substrate layout.
- Experience with package-to-board or complex PCB layout and an understanding of interactions among die floor plans, substrate layout, board interfaces, mechanical boundaries, and manufacturing rules.
- Experience completing design checks and releasing layout databases and manufacturing documentation to substrate or assembly suppliers.
- Bachelor's degree in electrical, electronics, packaging, or a related engineering discipline, or equivalent relevant experience.
Preferred Qualifications- Master's degree in electrical, electronics, packaging, or a related engineering discipline, or equivalent relevant experience.
- Practical experience implementing high-speed routing constraints for SerDes class interfaces, differential pairs, clocks, and other timing-sensitive signals.
- Strong technical communication, design review, problem-solving, and documentation skills, with the ability to coordinate across internal teams and external suppliers.
- Practical experience implementing high-current power and ground structures and working from SI and PI constraints and review feedback.
- Experience with large, high-I/O-count, or high layer count package and substrate layouts.
- In addition to Siemens Xpedition, experience with Cadence Allegro Package Designer Plus.
- Familiarity with advanced substrate materials, build up processes, microvias, embedded passives, fine-pitch local interconnect structures, and supplier design-rule development.
- Experience supporting a complex package or board design from feasibility and floorplanning through supplier review, manufacturing release, and build issue resolution.
Why Join Us? At Eridu, you'll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
