Staff Engineer, HIL Design, Hardware Integration & Test Automation

Cariad, Inc.

$161K — $234K *
Manufacturing & Automotive
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in a related technical discipline; Master's degree preferred.
  • 8+ years of experience in HIL design and embedded hardware.
  • Proven expertise in wire harness/interface documentation and system integration.
  • Strong knowledge of lab instrumentation and debugging techniques.
  • Familiarity with AI-enabled lab automation and infrastructure.

Responsibilities

  • Develop and own HIL architecture for automotive hardware platforms.
  • Define scalable configurations and technical standards for HIL benches.
  • Lead complex hardware bring-up across prototypes and revisions.
  • Establish harness and ICD documentation for integration and testing.
  • Manage and guide implementation of AI-driven workflows and MCP servers.

Benefits

  • Medical, dental, and vision insurance.
  • 401k with employer match and defined contribution plan.
  • Short and long-term disability insurance.
  • Tuition reimbursement and student loan repayment programs.
  • Unique vehicle lease program covering registration and insurance fees.
Full Job Description
Role Summary:

The Staff Engineer, HIL Design, Hardware Integration & Test Automation is responsible for the hardware-oriented architecture, technical standards, and bring-up strategy for HIL benches, integration benches, harnesses, Interface Control Documents (ICDs), and lab automation used to validate CARIAD hardware platforms. This is a hands-on staff-level individual contributor role requiring deep experience in HIL design, embedded hardware, wire harnesses, system integration, and cross-functional technical leadership. The role defines scalable HIL architectures, reviews and approves harness and interface documentation, leads the most complex hardware bring-up and debug activities, and establishes repeatable test execution from requirements and ICDs through lab evidence.

The Staff Engineer also owns the technical roadmap for the hardware side of an AI-enabled integration lab, including AI-agent-based workflows, MCP servers, equipment interfaces, automated evidence capture, governance, rollout metrics, and test orchestration for hardware validation.

Role Responsibilities:

HIL Architecture, Hardware Integration & Bring-Up Strategy
  • Own staff-level HIL architecture for embedded automotive hardware platforms, including I/O strategy, signal conditioning, fault insertion, load/sensor simulation, safety interlocks, instrumentation, reuse patterns, and bench readiness criteria.
  • Define scalable bench architectures, configuration baselines, readiness checklists, and technical standards for HIL benches, integration benches, breakout/load boxes, fixtures, harnesses, and lab stations used for HW/SW integration and validation. -
  • Lead the most complex board, ECU, and system bring-up across prototypes and revisions, including power, reset, clock, boot, flashing, communications, peripheral interfaces, diagnostics, and cross-domain issue isolation.
  • Provide technical direction for bring-up plans and debug strategies, ensuring ownership, evidence, decision records, and closure criteria are clear across engineering teams and suppliers.
  • Debug complex hardware/software interface issues using schematics, ICDs, harness drawings, logs, instruments, and controlled reproduction steps, while mentoring engineers on structured methods.

Wire Harness, ICD & Test Infrastructure Technical Ownership
  • Own and approve harness drawings, pinouts, connector definitions, cable assemblies, and lab wiring documentation required for integration and HIL execution.
  • Serve as technical authority for Interface Control Documents (ICDs) for bench and system interfaces, including electrical definitions, signals, protocols, timing, diagnostics, power states, and test coverage mapping.
  • Translate requirements, ICDs, schematics, and supplier documentation into HIL coverage strategy, test procedures, hardware fixture needs, automation requirements, and validation evidence expectations.
  • Establish configuration control and release discipline for benches, harnesses, firmware/images, flashing steps, lab equipment, scripts, and test artifacts.
  • Support DV/PV, EMC/ENV, manufacturing, and end-of-line readiness by ensuring lab infrastructure can reproduce failures, validate corrective actions, and scale across program needs.

AI-Enabled Hardware Lab, MCP Server Roadmap & Automation Standards
  • Own the hardware-side technical roadmap for an AI-enabled HW integration lab, including target workflows, tool interfaces, data sources, rollout plan, governance, safety constraints, and measurable execution benefits.
  • Define and guide implementation of MCP servers, APIs, or comparable tool interfaces for hardware testing, lab equipment control, bench state, test orchestration, artifact retrieval, and AI-agent operation.
  • Develop reusable AI-agent-based HW testing workflows for setup verification, instrumentation control, automated test execution, log capture, failure triage, evidence packaging, and status/report generation.
  • Partner with software, automation, IT, and validation teams to integrate AI agents with lab equipment, HIL frameworks, Jira, requirements repositories, SharePoint evidence, and test reporting tools.
  • Ensure AI-based lab workflows remain traceable, reviewable, safe for lab use, aligned with engineering judgment, and repeatable across programs.

Cross-Functional Technical Leadership, Supplier Coordination & Validation Readiness
  • Serve as staff-level escalation point for complex integration failures and drive structured triage across hardware, software, systems, validation, manufacturing, and supplier teams.
  • Influence supplier and internal deliverables for HIL equipment, harnesses, interface issues, board revisions, bench blockers, technical risks, and corrective actions.
  • Communicate status, blockers, risks, recovery plans, technical trade-offs, and decision needs with clear evidence and recommended next steps.
  • Document issues, debug findings, configurations, test evidence, technical decisions, and closure rationale in a structured and traceable manner.
  • Mentor engineers and improve lab practices, templates, checklists, and knowledge-sharing methods to strengthen repeatability and technical capability.

General Skills:
  • Staff-level technical leadership across HIL architecture, hardware integration, validation infrastructure, and lab automation.
  • Structured problem solving and disciplined hardware debug for ambiguous, cross-domain failures
  • Clear written, verbal, and executive-ready communication with data-backed recommendations.
  • Cross-functional influence across hardware, software, systems, validation, manufacturing, suppliers, and lab operations
  • Ownership of standards, documentation, issue tracking, action follow-through, risk escalation, and closure criteria
  • Ability to operate with urgency in a hands-on prototype lab environment while improving repeatability and safety
  • Ability to convert ambiguous lab problems into scalable processes, owners, evidence, and durable corrective actions
  • Process-oriented execution in complex, high-reliability systems programs with mentorship of less experienced engineers

Required Specialized Skills:
  • Staff-level ownership of HIL architecture for embedded ECUs or comparable high-reliability systems, including architecture standards, signal/I/O mapping, fault insertion, load/sensor simulation, safety interlocks, and scalable bring-up methods.
  • Embedded hardware integration and bring-up across power, reset, clock, boot, peripherals, firmware, BSP, drivers, test infrastructure, and HW/SW issue isolation, with ability to guide other engineers through complex investigations.
  • Wire harness and ICD technical ownership, including connector/pinout definition, signal routing, shielding/grounding, continuity checks, electrical interfaces, protocols, timing, diagnostics, and coverage strategy.
  • Ability to interpret schematics, datasheets, PCB/connector documentation, debug reports, supplier deliverables, and system requirements to define coverage and resolve integration issues. HIL bench and test fixture architecture/documentation, including benches, breakout/load boxes, fixtures, cable assemblies, configurations, readiness checklists, reuse strategy, and configuration control.
  • Strong lab instrumentation and interface knowledge, including scopes, meters, power supplies, loads, logic analyzers, CAN/Ethernet/serial tools, JTAG, CAN, LIN, Ethernet, USB, UART, SPI, I2C, GPIO, analog/digital I/O, power/wake lines, and diagnostics. Python automation for instrument control, data capture, sequencing, log parsing, evidence collection, repeatable execution, and reusable automation libraries.
  • Structured debug and AI-enabled lab automation, including MCP servers/APIs or comparable interfaces for equipment control, orchestration, artifact retrieval, triage, governance, rollout metrics, and traceable closure.
  • Ability to define technical standards, mentor engineers, and influence lab practices across prototypes, harnesses, fixtures, benches, suppliers, and cross-functional engineering teams.

Desired Skills:
  • Automotive ECU experience, including telematics, connectivity, infotainment, zonal controllers, high-performance compute platforms, or similar embedded hardware.
  • Commercial or custom HIL platform experience, such as dSPACE, NI/VeriStand, Vector, ETAS, Speedgoat, Keysight, or Python-based frameworks.
  • Experience with Linux, Android, QNX, Yocto, adb/serial console, flashing, bootloaders, diagnostics, manufacturing/EOL tooling, DV/PV, EMC/ENV, validation, or supplier issue support.
  • AI-agent lab workflow or AI roadmap experience, including setup checks, instrumentation control, failure clustering, evidence/report generation, tool interfaces, data architecture, governance, and measurable adoption.
  • Familiarity with systems, requirements, verification, safety, cybersecurity, or automotive process standards such as ISO/IEC/IEEE 15288/29148, IEEE 1012, ASPICE, ISO 26262, ISO/SAE 21434, DO-254, DO-178C, or SAE ARP4754A/B.

Workplace Flexibility:
  • Onsite lab work is required.
  • This role requires daily hands-on work with HIL benches, prototypes, harnesses, cable assemblies, fixtures, power supplies, instruments, and debug equipment.
  • Must be comfortable working directly with prototype hardware, lab wiring, bench configuration changes, controlled hardware test execution, and technical reviews in lab environments.
  • Limited travel may be required for supplier support, build support, external test labs, or equipment/vendor reviews.

Years of Relevant Experience:
  • 8+ years of relevant experience in HIL design, embedded hardware bring-up, wire harness/interface documentation, system integration, hardware validation, lab automation, or debugging of automotive or comparable high-reliability embedded platforms.

Required Education:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Systems Engineering, Mechatronics, or related technical discipline

Desired Education:
  • Master's degree in Electrical Engineering, Computer Engineering, Systems Engineering, Mechatronics, or related discipline

Compensation

Salary range is dependent on factors such as geographical differentials, credentials or certifications, industry-based experience, qualification and training. In the city of Mountain View, the salary range for this position is $161,710 - $234,325.

CARIAD, Inc. provides performance based merits and annual bonus along with a competitive benefits package. Benefits include medical, dental, vision, 401k with employer match and defined contribution plan, short and long term disability, basic life and AD&D insurance, employee assistance program, tuition reimbursement and student loan repayment plans, maternity and non-primary caregiver leave, adoption assistance, employee referral program and vacation and paid holidays. We also offer a unique vehicle lease program that covers registration and insurance fees.

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