Senior Hardware / Software Design Engineer III with TS/SCI + Poly

Aperio Global

$130K — $230K *
Aerospace & Defense
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree plus 8 years of relevant experience or equivalent
  • Expertise in FPGA development and digital signal processing
  • Proficient in C and C++ programming languages
  • Experience in software-hardware integration
  • Active TS/SCI security clearance with Polygraph required
  • Knowledge of signal processing blocks and DSP components
  • Familiarity with Vivado and Epiq Solution PDK is a plus

Responsibilities

  • Lead technical design efforts for electronic hardware and software components
  • Implement DSP algorithms in FPGA hardware
  • Integrate FPGA code with existing software bases
  • Document design and testing processes effectively
  • Optimize resource allocation and ensure timing closure in FPGA development
  • Deliver complete subsystem solutions encompassing hardware and software
  • Collaborate with team members to meet mission-critical requirements

Benefits

  • Health Care Plan (Medical, Dental, & Vision)
  • Retirement Plan (401k, IRA) with 100% employer match up to 6%
  • Life Insurance (Basic, Voluntary & AD&D)
  • Paid Time Off (Vacation, Sick & Public Holidays)
  • Short Term & Long Term Disability
  • Professional Development opportunities
  • Comprehensive benefits package designed for employee well-being
Full Job Description
Aperio Global seeking an experienced senior HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions.

Mission Focus:

You will implement DSP and associated technical components in FPGA for code base integration.

Technical Proficiency: Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software; Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++

Qualifications: Bachelor's degree plus 8-years of relevant experience or equivalent.

Security Clearance: Active TS/SCI with Polygraph required.

Nice to Have:
Additional experience with Vivado required; experience with Epiq Solution PDK preferred

Salary Range: Dependent on Level and Experience: 130k-230k

The salary range for this role represents Aperio's good-faith estimate of compensation at the time of posting. Placement within the range is based on multiple factors, including but not limited to an individual's qualifications, relevant experience, education, certifications, technical skills, contract labor categories and/or rates, work location, market conditions, and business needs.
Benefits

At Aperio Global, we understand the value of investing in our most important asset-our employees. That's why we have crafted a comprehensive benefits package designed to help you make the best decision for yourself, your family and your lifestyle. For additional details, contact our talent acquisition team.
  • Health Care Plan (Medical, Dental & Vision)
  • Retirement Plan (401k, IRA) with 100% employer match up to 6%
  • Life Insurance (Basic, Voluntary & AD&D)
  • Paid Time Off (Vacation, Sick & Public Holidays)
  • Short Term & Long Term Disability
  • Professional Development
  • (and much more)


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