About SiTime

SiTime Corporation is the precision timing company. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry. For more information, visit www.sitime.com

Job Summary

We are seeking a seasoned FPGA Architect with a minimum of 10 years of experience to lead the design and development of FPGA-based platforms that support internal testing and validation of our precision, high-performance MEMS timing products. This role is critical to developing robust infrastructure for frequency measurement, low phase noise and low jitter characterization, production, and system-level validation

Responsibilities:

• Architect and implement scalable FPGA solutions for internal hardware platforms used in MEMS timing product testing
• Lead cross-functional technical initiatives involving CMOS design, MEMS design, systems and test engineering, validation, and production teams
• Define and drive system-level requirements, ensuring alignment across hardware, software, and test domains
• Own the full FPGA lifecycle: architecture, RTL design, simulation, synthesis, timing closure, and bring-up
• Develop reusable IP blocks and maintain a modular, maintainable FPGA infrastructure
• Champion design reviews, documentation standards, and continuous improvement practices
• Provide technical leadership and mentorship to junior engineers and influence strategic direction across multiple programs
• Act as a key technical liaison between engineering, product, and operations teams to ensure seamless integration and execution

Qualifications & Requirements :

• MS in Electrical Engineering, Computer Engineering, or related field
• 10+ years of hands-on experience in FPGA architecture and development (Xilinx, Intel/Altera, or similar)
• Deep expertise in Verilog/VHDL, simulation tools (ModelSim, Vivado, etc.), and scripting (Python, TCL)
• Proven track record in designing systems with low jitter, low phase noise, and high signal fidelity
• Strong understanding of timing analysis, clock domain crossing, and high-speed interfaces (PCIe, DDR, SERDES)
• Experience with lab bring-up, debugging tools (logic analyzers, oscilloscopes), and test automation
• Demonstrated leadership in driving cross-functional initiatives and delivering complex technical programs
• Excellent communication, collaboration, and stakeholder management skills

Preferred Qualifications

• Experience in MEMS or timing product domains
• Familiarity with hardware/software co-design and embedded systems
• Exposure to production test environments and ATE systems
• Experience presenting technical strategies and outcomes to executive leadership

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals-reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company's future growth and success.

Benefits offered : 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.

SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.

Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

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