Job Description SummaryAs a PCB Design Engineer for Critical Infrastructure Communications (CIC) at GE Grid Solutions, you will own the technical integrity of our hardware design ecosystem. You will be responsible for defining and enforcing the standards for our global Altium component libraries, footprints, and design templates, while acting as the lead PCB designer for our industrial-grade communications products. CIC is seeking an experienced Electrical Engineer who thrives on technical precision, possesses a deep understanding of PCB fabrication and assembly, and is committed to building a world-class design environment that enables our global team to deliver reliable, high-performance hardware.
A successful candidate will have practical PCB layout and library management experience within a professional engineering environment. The ideal candidate should have working knowledge at the product level, as the candidate will be required to own various aspects of the design throughout the product lifecycle, including the maintenance of our centralized ECAD data and the execution of high-density board layouts. The successful candidate must also be capable of working collaboratively with peers in an international engineering organization to ensure design goals are met, technical standards are harmonized, and critical manufacturing trade-offs are identified. This role requires strong written and verbal communication skills to accurately convey complex design solutions to audiences of varying technical expertise on a cross-functional team spanning multiple sites.
Job DescriptionRoles and Responsibilities:- ECAD Governance: Lead the convergence and standardization of global Altium ECAD databases. Manage the master component library, including creation of high-quality schematic symbols, IPC-compliant footprints, and 3D models.
- PCB Layout Execution: Own the end-to-end PCB design process, including multi-layer stackup design, impedance control, high-speed routing, and thermal/mechanical integration for complex mixed-signal and RF circuits.
- Design for Manufacturing (DFM): Develop and enforce DFM guidelines working with Manufacturing Teams to ensure layout designs align with both internal and external manufacturing/assembly capabilities.
- Infrastructure Ownership: Maintain and optimize Altium design rules, Outjobs, and template systems to drive design efficiency and consistency across international engineering teams.
- Technical Collaboration: Collaborate with Hardware Engineers to interpret schematics and translate them into high-reliability hardware, ensuring EMC, thermal, and mechanical constraints are met.
- Technical Liaison: Serve as primary point of contact between Hardware Engineers and PCB manufacturers. Resolve Engineering Questions (EQs) working closely with design team and incorporate feedback into our internal standards where applicable.
- Lifecycle & Sustaining: Manage Engineering Change Orders (ECOs) for library and board design updates; mitigate component obsolescence through proactive selection of alternatives and necessary layout modifications.
- Documentation: Maintain comprehensive records, including top-level BOMs, fabrication documentation, and detailed design specifications. Complete schematic and PCB layouts containing digital, analog, and RF circuitry.
Required Qualifications:- Bachelor's degree in Electrical Engineering or related technical field.
- Minimum 3 years of dedicated professional experience in complex, multi-layer PCB Layout and Altium Designer usage.
- Minimum 2 years of experience managing or maintaining centralized ECAD library (schematic symbols, PCB footprints, and component databases)
- Minimum 3 years of professional experience in electronic hardware design.
Desired Characteristics:- Advanced proficiency in Altium Designer with a deep understanding of constraint managements, rule implementation, and database library implementation.
- Familiarity with industrial communications protocols (Ethernet, USB, SPI, I2C, etc.) and implementation of discrete DC/DC PCB layouts.
- Experience with RF design and PCB best practices in the sub-1GHz range.
- Strong background in PCB stack-up design, impedance control, length matching, and EMC mitigation techniques.
- Experience leading and participating in PCB design reviews.
- Ability to work collaboratively with an internation development team.
- Familiarity with MCU, SoC, and modem Integration for 4G LTE, 5G, and WiFi technologies in the context of PCB design.
- Exceptional organization skills with a commitment to documentation and process control.
- Demonstrated ability to work autonomously and collaborate with a team to resolve technical issues.
- Knowledge of international standards (62368-1, FCC, ETSI, CE Mark) as they pertain to PCBA design.
- Strong interpersonal and leadership skills, capable of training and supporting other engineers in Altium best practices.
Relocation Assistance Provided: Yes
For candidates applying to a U.S. based position, the pay range for this position is between $80,000.00 and $120,000.00. The Company pays a geographic differential of 110%, 120% or 130% of salary in certain areas. The specific pay offered may be influenced by a variety of factors, including the candidate's experience, education, and skill set.
Bonus eligibility: discretionary annual bonus.
This posting is expected to remain open for at least seven days after it was posted on September 21, 2026.
Available benefits include medical, dental, vision, and prescription drug coverage; access to Health Coach from GE Vernova, a 24/7 nurse-based resource; and access to the Employee Assistance Program, providing 24/7 confidential assessment, counseling and referral services. Retirement benefits include the GE Vernova Retirement Savings Plan, a tax-advantaged 401(k) savings opportunity with company matching contributions and company retirement contributions, as well as access to Fidelity resources and financial planning consultants. Other benefits include tuition assistance, adoption assistance, paid parental leave, disability benefits, life insurance, 12 paid holidays, and permissive time off.
