Cisco

Mixed Signal IC Developer - Acacia (Hybrid)

Cisco$113K — $161K *
Telecommunications & Hardware
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree with 5 years of experience, Master's with 3 years, or PhD with no experience in related fields.
  • Experience designing, simulating, and measuring high speed ICs in multiple areas such as High-Speed Serial Links and Output Drivers.
  • Strong understanding of system link simulations and modeling requirements.
  • Familiarity with high performance Phase Locked Loops and clock transmission techniques.
  • Proficient in designing opamps and programmable gain amplifiers.

Responsibilities

  • Collaborate with the team to design and layout ultra-deep sub-micron CMOS products.
  • Participate in peer reviews of IC designs, bringing solid design methodologies from conception to production.
  • Track project deliverables while collaborating closely with section leads and team members.
  • Ensure signal and power integrity specifications are met in designs.
  • Contribute to developing innovative high speed AMS circuits.

Benefits

  • Hybrid work model allowing three days in the Ottawa office.
  • Collaborative team environment focused on personal growth and success.
  • Opportunity to engage with various Acacia groups for broader interdisciplinary experience.
Full Job Description
The application window is expected to close on:
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

This is a hybrid role that can be performed three days per week from our Ottawa office.

Meet the Team

Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth.

Your Impact

As a member of the Mixed Signal Design team, you are a member of a small, dynamic IC Design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. You will design, layout, measure and productize ultra-deep sub-micron-based CMOS products.

You will work with section lead and team members to design blocks on a complex chip and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production.

You will also collaborate with section lead to ensure signal and power integrity specifications are met.

You are enthusiastic about developing high speed AMS circuits and best-in-class products that push the boundaries of what is possible.

You are detail oriented, high energy and the drive to get things done and solve difficult problems.

You are capable to figure things out by yourself, but you also participate in our friendly and team-oriented collaboration approach, which means you enjoy learning from your colleagues and letting them learn from you.

You are not shy to always point out how we can be more effective as a team, and you are open to similar suggestions by your team members.

Minimum qualification:

Bachelors + 5 years of related experience, or Masters + 3 years of related experience, or PhD + 0 years of related experience.

Experience in design, simulation and measurement of high speed ICs in at least 3 of the areas listed below:

* High Speed Serial Links utilizing serializers, deserializers, and data convertors.

* Modeling requirements for system link simulations

* High Performance Output Drivers* High Performance Phase Locked Loops

* Efficient clock transmission/propagation.

* Opamps and Programmable Gain Amplifiers.

* Equalization techniques.

Preferred Qualifications

Experience with electrical transceiver applications including backplane and cable communications.

* Experience in FinFET and GAA technologies.

* High-frequency layout experience including floorplaning (power/ground, digital/analog signal routing), passives components (inductors, transformers, and transmission-lins).

* Experience in design for manufacturability including characterization over PVT, electromigration analysis,self-heating, and IR drop analysis.

* Experience in laboratory validation including ESD practices/methodology and construction of test setups.

* Experience in design software including Cadence (Virtuoso), Specture/APS/SpectreX, layout validation tools (Virtuoso and Calibre), EMX, mixed-signal simulations in AMS, and Matlab.

Cisco may use AI Tools to review candidate-provided details-such as skills, experience, location, and education-to determine how closely candidates match job criteria. AI Tools are intended to guide and support the recruitment team in identifying and prioritizing candidates but are not used in isolation or without human judgment. For more information about Cisco's use of AI please see the Job Candidate Privacy Statement found here.

About Cisco

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79,500 employees
Market Cap
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Industry
Net Income
$10.1 billion
Founded
2014
5 Year Trend
+1.4%
Revenue
$48 billion
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