You will help shape next-generation High Bandwidth Memory solutions for artificial intelligence and accelerated computing. You will serve as a senior technical contributor and technical project leader, guiding work from architecture definition through silicon bring-up and post-silicon support. You will partner across design, process, packaging, and product teams to deliver reliable silicon with broad business impact. You will influence future memory architectures while mentoring engineers and improving design execution. Job Description Responsibilities will include, but are not limited to: • Serve as a senior technical contributor and technical project leader, owning complex High Bandwidth Memory (HBM) technical domains from architecture definition through tape-out, silicon bring-up, and post-silicon support. • Lead cross-functional execution across design, process, packaging, validation, test, and product engineering teams to deliver high-quality HBM solutions. • Own and deliver critical HBM design blocks and subsystems while balancing performance, power, reliability, yield, and manufacturability trade-offs. • Drive root-cause analysis and resolution of complex pre-silicon and post-silicon issues across circuit design, architecture, process integration, and packaging interactions. • Research, develop, and influence next-generation HBM architectures aligned with artificial intelligence, machine learning, and high-performance computing workloads. • Define and communicate technical strategy, priorities, and execution plans while proactively identifying risks, dependencies, and schedule impacts. • Mentor engineers through design reviews, architectural guidance, and hands-on problem-solving while operating with a high degree of autonomy and broad organizational impact. Minimum Qualifications: • Experience delivering Dynamic Random-Access Memory (DRAM) or High Bandwidth Memory designs from architecture through silicon bring-up and post-silicon support. • Strong expertise in DRAM operation and Joint Electron Device Engineering Council (JEDEC) standards, including HBM product families. • Demonstrated ability to lead complex technical projects across multidisciplinary engineering teams. • Deep experience in complementary metal-oxide-semiconductor (CMOS) circuit design, transistor-level design, and semiconductor device physics. Preferred Qualifications: • Experience with digital design using Register Transfer Level (RTL) methodologies such as Verilog, or similar. • Experience with analog modeling and simulation tools such as FastSpice or HSPICE, or similar. • Exposure to DRAM memory array design, high-speed clocking or interface design, logic or custom circuit design, or power delivery optimization. • Experience with 2.5D or 3D packaging technologies such as through-silicon vias, hybrid bonding, or interposers. • Strong communication skills with the ability to clearly explain complex technical concepts to engineers, leaders, and internal customers. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.