About the RoleFPGA/RTL EngineerWe're looking for an experienced FPGA/RTL engineer to help build our state-of-the-art optical communication system - the hard-real-time logic that connects optical communication terminals to embedded computers. You'll work closely with our optical communication team to design and own HDL for optical-link interfaces and high-speed data pipelines for in-orbit and ground communications. This is active development on a live flight program with near-term launch milestones: you'll join a small team, take full ownership of workstreams from day one, and see your designs fly.
Responsibilities- Design, implement, and verify HDL/RTL in SystemVerilog/Verilog for the FPGA subsystems of our state-of-the-art optical communication system, from architecture through on-orbit operation
- Partner directly with the optical communication team to design and implement FPGA logic for free-space optical communication links, including modem interfacing, framing/synchronization, and high-throughput data pipelines
- Develop high-throughput communication pipelines for moving compute and optical-link data from orbit to the ground, including high-speed Ethernet (10/25/40/100GbE) MAC/PCS logic, SERDES/transceiver configuration, and link-layer framing within the FPGA fabric
- Build memory-mapped register interfaces (AXI) between FPGA logic and onboard flight software, and define the hardware/software contract with flight software engineers
- Own timing closure, synthesis, and implementation across Zynq UltraScale+ and Versal targets using Vivado and related toolchains
- Develop testbenches and simulation environments to verify designs before hardware, and validate on the bench with logic analyzers, oscilloscopes, and protocol analyzers
- Lead board bring-up and hardware integration for new payload avionics, working closely with electrical and embedded software engineers
- Investigate anomalies spanning the optical-link-to-ground and software chain, perform root cause analysis, and drive fixes across hardware/firmware/software boundaries
- Document designs and interfaces, and pair with teammates to spread ownership of the FPGA function across the team
Basic Qualifications- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- 5+ years of experience in FPGA/HDL design, including architecture, verification, synthesis, and timing closure
- Proficiency in SystemVerilog or Verilog for production FPGA development
- Hands-on experience with Xilinx/AMD FPGA platforms (e.g., Zynq, Zynq UltraScale+) and toolchains (Vivado, Vitis)
- Experience designing high-speed digital interfaces and DDR/DMA-based datapaths
- Experience integrating FPGA logic with embedded software, including memory-mapped register interfaces and driver-level debugging
- Experience developing FPGA platforms for multi-gigabit data pipelines, including integrating forward error correction and other stabilization techniques - optical communication or high-speed Ethernet experience strongly preferred
- Hands-on hardware bring-up and lab debugging experience with oscilloscopes, logic analyzers, and embedded debug tools
- Demonstrated ability to own open-ended design problems independently and carry them from architecture through hardware and on-orbit operation
Preferred Qualifications- Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
- Experience in aerospace, defense, semiconductor, or other high-reliability development
- Experience with free-space or fiber optical communication systems - optical communication terminals, coherent/direct-detection modems, or high-speed optical transceivers
- Experience implementing Ethernet or other high-speed serial protocol layers (MAC/PCS/PMA) directly in FPGA fabric - a big plus
- Understanding of network topology and architecture (routing, switching, protocol stacks) - a bonus
- Familiarity with Versal ACAP architecture and Quartus toolflows
- Experience with simulation and verification tools such as Questa/ModelSim, Xcelium, or Verilator, and with UVM or other structured verification methodologies
- Proficiency with C/C++, Python, and TCL for bring-up, test automation, and tooling
- Experience with hardware-in-the-loop testing and automated regression of FPGA designs
- Familiarity with fault-tolerant design and radiation effects mitigation (SEU scrubbing, TMR, configuration memory integrity) for space applications
- Experience thriving in fast-paced, high-ownership environments with rapid iteration cycles
Compensation and BenefitsThe salary range for this position is
$150,000 - $200,000 annually.
The actual base salary offered will depend on factors such as job-related skills, experience, qualifications, and internal equity.- Equity in Cowboy Space Corp.
- Employees and their eligible dependents may enroll in medical, dental, and vision insurance
- 401(k) retirement savings plan
- Paid time off
- 10 paid holidays per calendar year
- Paid parental leave
- Relocation assistance if applicable
- Daily lunch in the office and a fully stocked kitchen with beverages and snacks
