Position SummaryWe are seeking a highly experienced Device Engineer to join our cutting-edge 2nm Gate-All-Around (GAA) device engineering team.
In this individual-contributor role, you will be responsible for process - device co-optimization to enhance transistor performance and targeting, reliability, yield learning and manufacturability GAA technology derivatives. This role will collaborate closely with integration, process module, Fab engineering and DFM teams, to deliver industry-leading device performance at the 2nm node and beyond and works on problems of diverse scope or on advanced assignments that require considerable judgment and initiative. Minimal supervision is required unless major decisions are made where the supervisor is needed and may provide guidance to non-exempt and exempt personnel.
Role and ResponsibilitiesHere's What You'll Be Responsible For:- Perform split lot design and DOE analysis to identify key process knobs impacting device performance and yield.
- Collaborate with integration and module teams to resolve device-process interactions and define optimization paths.
- Lead root cause analysis for device failures and non-conformances; drive corrective actions across fab operations.
- Drive Task Force Teams to solve systematic yield, performance, or reliability issues.
- Ensure targeting of transistor focused Electrical Test (ET) trends to Customer/Product specifications and perform timely root cause study to shifts or abnormality. Analyze process interactions (inline metrology, FDC, etc.) to ET while also understanding ET data effect on Parametric Yield.
- Owns Parametric Yield and Wafer Acceptance Electrical Test (WAT) management for one or more Customer Accounts/Products.
- Support unit process (ex: CMP, Etch, etc) or process integration team with evaluation of device impact for key change points (ex: for performance/ yield improvement activities, etc.).
- Generate written reports and oral presentations for internal management, external teams, and company executives.
- Conduct Local Layout Effects ( LLE) analysis to characterize and mitigate transistor performance variability driven by neighboring pattern density, in GAA nanosheet devices, and providing paths to module and fab engineering to improve process and feeding findings into design rule definition and SPICE models, where applicable.
- Lead Material to Hardware Correlation (MHC) task force to systematically link upstream material and process metrology data (film composition, stress, defectivity) to final electrical device performance, enabling predictive process control and accelerating yield ramp at the 2nm node.
Skills and QualificationsHere's what you'll need:- Bachelors of Science or Engineering (Electrical, Computer, Chemical, Material Science, or related areas) required. Masters or PhD is a plus 3-8 years of experience relevant experience
- 5+ years of industry experience is preferred. Job grade will be dependent upon relevant experience
- Understanding of the interactions between process and Electrical test. Knowledge of process flow - Familiarity with unit processes including thin films deposition, etch, diffusion, wet process, CMP, lithography, implant, anneal, etc.
- Willing to work and learn in a fast-paced environment.
- Analysis skills, including electrical device characterization, yield analysis, data mining, DOE, and SPC. Spotfire experience highly preferred.
- Must have excellent communication, documentation and presentation skills.
- Must be capable of shifting focus and changing priorities - dealing with ambiguity. Demonstrated ability to meet deadlines and commitments while managing multiple priorities.
- SPICE modeling and simulation experience preferred
- Ability to reason logically and make sound decisions, to consider alternative and diverse perspectives, to communicate effectively both orally and in writing, to remain poised under all circumstances, and to interact effectively with people in a positive manner that engenders confidence and trust
- Ability to complete assigned tasks without direct supervision
- Ability to exercise independent judgment and make decisions
- Ability to work effectively and efficiently in high stress and conflict situations. Good communication and interpersonal skills
The current base salary range for this role is between $106,000 - $206,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.
Total RewardsAt Samsung SAS, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.
We offer a comprehensive benefits package, including:
- Medical, dental, and vision insurance
- Life insurance and 401(k) matching with immediate vesting
- Onsite café(s) and workout facilities
- Paid maternity and paternity leave
- Paid time off (PTO) + 2 personal holidays and 10 regular holidays
- Wellness incentives and MORE
Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
All positions at SAS are full-time on-site.
