Job Details:Job Description: Position Overview:
As an Analog Circuit Design Engineer, you will play a pivotal role in designing, developing, and optimizing cutting-edge analog and mixed-signal circuits that power Intel's advanced process nodes. You will collaborate with cross-disciplinary teams to bring high-performance, low-power solutions to life, contributing to Intel's success in delivering world-class products.
Key Responsibilities:
- Design and develop complex analog and mixed-signal circuits, including transmitters (TX), receivers (RX), amplifiers, filters, clocking systems, and on-die voltage regulators
- Perform circuit analysis and tradeoffs to optimize power, performance, area, timing, and yield
- Create and validate behavioral models for analog and mixed-signal IPs for system-level integration
- Develop and oversee floorplans and layouts while ensuring adherence to design rules and robustness
- Conduct small signal analysis, stability testing, and compensation of feedback loops to meet performance specifications
- Collaborate with architecture, layout, and validation teams to ensure seamless integration of designs into products
- Author microarchitecture specifications, test plans, and documentation for design verification and validation
- Conduct post-silicon validation and debug to ensure design functionality and performance meet product requirements
- Provide technical mentorship and contribute to design reviews to enhance team-wide engineering excellence
- Leverage industry-standard tools and methodologies, such as Synopsys and Cadence, for design and simulation
You should demonstrate the following professional traits to be successful:
- Effective collaborator who works well across cross-disciplinary teams including architecture, layout, and validation
- Strong problem-solver with a system-level mindset and the ability to navigate complex technical tradeoffs
- Committed to engineering excellence through mentorship, thorough documentation, and active participation in design reviews
Qualifications:Minimum Qualifications
- Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience, or Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience, or a PhD in Electrical Engineering or Computer Engineering
The years of experience must include the following:
- VLSI analog circuit design, small-signal analysis, and understanding of foundational digital design concepts
- Synopsys and Cadence design tools and flows
- Design optimization techniques related to performance, power, and area
Preferred Qualifications
- Knowledge of high-speed IO signaling, transmission line theory, and power delivery concepts
- Familiarity with PLLs, ADCs, DACs, switched-capacitor circuits, and noise analysis methodologies
- Experience with scripting, Matlab, and post-silicon characterization using lab tools such as oscilloscopes and signal generators
- Cross-disciplinary knowledge in analog integration, RTL, static timing analysis, and power grid design
- Proven track record of system-level understanding, problem-solving, and effective collaboration in a team setting
- VS Code, Python, and GitHub Copilot
Job Type:Experienced Hire
Shift:Shift 1 (United States of America)
Primary Location: US, California, Santa Clara
Additional Locations:US, California, Folsom
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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