Full Job Description
Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record.
Required Skills and Experience:
• Self-motivated engineer who has strong technical background in design and electrical analysis.
• Solid background in semiconductor fabrication and packaging
• Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions. - Ability to work independently and at various levels of abstraction
• Strong organization, time management, and communication skills, self-motivated.
• Experience with design and electromagnetic simulation tools: Mentor, Cadence tools, SPICE, Ansys tools etc.
• Experience in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity), and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx).
• Experience and knowledge with assembly process, test and characterization techniques preferred
Qualifications:
• Ph.D./master's in electrical engineering/ chemical engineering/ mechanical engineering or Material Science.
• 10+ years and in-depth knowledge/background in Package, PCB design, or IC digital design.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
US, Oregon, Hillsboro
Job posting details (such as work model, location or time type) are subject to change.
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