Lead innovations in CPU RTL methodologies, driving efficiency in silicon development while collaborating with cross-functional teams to ensure design integrity and scalability.

Shape innovative CPU development by leveraging AI tools to enhance RTL coding, drive architectural discussions, and collaborate across teams, ensuring design excellence in power, performance, area, and timing.

Join a team that's shaping the future of silicon development through innovative CPU RTL methodologies, driving efficiency with AI tools while collaborating with diverse teams to enhance product scalability and performance.

Shape the future of high-performance networking as a Senior SoC Network Subsystem Architect, leading architecture design for next-gen IPU/DPU platforms. Collaborate cross-functionally to create scalable, efficient solutions for cloud and AI workloads.

Partner with us to shape next-gen SoC chiplet architecture for high-performance data centers. Drive innovation across systems, balancing power, performance, and efficiency while leading cross-functional teams on cutting-edge technologies.