Empower cutting-edge ASIC packaging innovations by leading signal and power integrity design, collaborating across teams to achieve optimal high-speed performance and reliability, while mentoring junior engineers and driving continuous improvement.

Bring your expertise to drive the next generation of ASIC packaging, ensuring robust signal and power integrity through meticulous design, analysis, and collaboration across multi-disciplined engineering teams.

Champion cutting-edge ASIC packaging design, ensuring robust signal and power integrity while leading a skilled team in high-performance environments. Drive innovation through collaboration across engineering disciplines for optimal results.

Drive innovation by developing software for diagnostic and BSP solutions, ensuring the reliability of network hardware across various platforms, and collaborating with cross-functional teams to solve complex technical challenges.

Lead the charge in developing next-gen ASIC packaging by defining and optimizing design rules, collaborating with teams, and mentoring engineers for signal and power integrity in high-performance environments.