Drive innovation by leading the Signal and Power Integrity Team to define, design, and verify cutting-edge ASIC packaging solutions, ensuring optimal performance across diverse platforms while mentoring junior engineers and fostering collaboration.

Champion the future of ASIC packaging by leading a team focused on signal and power integrity. Drive design, analysis, and collaboration to ensure high-performance solutions across diverse platforms, while mentoring junior engineers.

Shape the future of ASIC packaging by leading our Signal and Power Integrity Team. Drive design, verification, and collaboration to ensure optimal performance across high-speed platforms while mentoring junior engineers and fostering innovation.

Unlock the potential of next-gen ASIC packaging by leading a team focused on signal and power integrity. Drive design, analysis, and collaboration to ensure optimal performance across various platforms while mentoring junior engineers.

Lead the charge in developing next-gen ASIC packaging while guiding our Signal and Power Integrity Team. Collaborate with cross-functional teams to ensure optimal design and performance across various Cisco platforms.