The CPU Gate Level Synthesis Engineer at Apple will drive the development of high-performance, low-power digital designs for cutting-edge CPUs. This role involves optimizing design quality through RTL to gate level synthesis and collaborating with cross-functional teams to enhance synthesis methodologies.

Shape the future of microarchitecture as you drive RTL design, verification, and performance correlation, collaborating with cross-functional teams to achieve optimal power, performance, and area specifications.

Shape the future of high-performance SoC design through innovative CAD methodologies, collaborating with cross-functional teams to enhance PPA and productivity, while leveraging GenAI tools to drive advancements in next-generation technology solutions.

Transform your engineering career by collaborating on power modeling for cutting-edge SOCs. Join a vibrant team that optimizes power efficiency across various IPs and technologies while influencing the development of groundbreaking products.

Grow your career with a dynamic team driving innovative battery pack designs, leading mechanical development from concept to production while collaborating with vendors and cross-functional teams to optimize and validate designs.