$250K — $500K+*
Xeon Performance Group XPG leadership team is looking for a principal engineer in Validation with prior SoC or IP pre-silicon Validation experience to join our organization This individual will be responsible for driving overall product quality of Xeon server program(s) through validation strategy, test plans content development and content execution, improving coverage, working with other managers and tech leads within XPG and other partner organizations. This candidate would be expected to effectively interface and influence architects, microarchitects, pre-silicon simulation teams, emulation teams and post-si validation partner teams to define/develop/execute cohesive validation plans to get to high quality Tape-In and PRQ. We also expect this candidate to define new and innovative strategies to shift-left and find HW/FW bugs faster and prior to Tape-In, minimizing any escapes into post-si. The candidate should have a proven track record of delivering exceptional results through hands-on technical involvement either through content development or debug or writing validation strategies. Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences voting membership in international standards committees generation of patents and technical papers. Note: This job code can only be assigned if an employee has participated in an official Technical Leadership Program TLP nomination process for his/her business group. An employee's manager must confirm participation in TLP nomination process prior to job code assignment.
The applicant should have a BS, MS or PhD in Electrical or Computer Engineering Science or related field with 15 years of technical experience in silicon design and/or validation/verification.
Some key skills and experience for this technical lead will include:
Valid through: 4/17/2021
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