Verification Engineer

NXP Semiconductors   •  

Austin, TX

5 - 7 years

Posted 177 days ago

This job is no longer available.

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. 

Senior Verification Engineer

Company Description

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets.

Business Unit Description

NXP’s Automotive business unit offers sensor and processing technology that drives all aspects of the secure connected cars of today and the autonomous cars of tomorrow.

Job Summary:

The Functional Verification role will involve many aspects of functional verification including SoC and DMS (Digital Mixed Signal) verification using most effective methodologies. A strong ability to map requirements into a traceable verification plan is important.  Engagement and collaboration across the global sites is a key aspect of this role as global alignment of functional verification methods is essential and sharing of verification resources is common. Strong technical, communication, and consensus building skills will be required as well as a demonstrated ability to influence solutions across a global organization.  The ideal candidate will partner with local and global SoC and IP developers to drive best practices with a target of ongoing productivity improvement. A “zero-defect” mindset is a key enabler.  Responsibilities encompass the development of verification test bench, development of verification components, test case development for simulation and formal verification methods, debugging failures and creating simulation cases for various studies Expectations include:

  • Verification planning;
  • Verification test bench development and implementation;
  • Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs;
  • Development of direct and constrained-random stimulus;
  • Understands and analyzes RTL code, functional, assertion coverage results;
  • Understands Develop functional coverage;
  • Understands and develops system Verilog assertions;
  • Understands and implements formal verification methods;
  • Strong skills in debug, failure re-creation and root cause analysis
  • Applicant should have efficient debugging and logic skills. Familiarity with major simulation and debug tool vendors is a plus.

Job Qualifications:

BSEE / MSEE / PhD 5+ years’ experience in Semiconductor industry. In depth experience in functional verification and/or SoC integration is required. Experience with various emulation/accelerator methods and use-case environments is an additional benefit.

  • C/C++/Assembly Language Programming skills in ARM A/R/M series, PPC
  • NIC/FlexNOC interconnect with Cache coherency ,/DDR3/LPDDR4/Flash memory subsystem architecture knowledge
  • Communication Protocols like LIN, CAN, FlexRay Graphics/Multimedia/Networking IPs like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/Computer Vision, RADAR processing
  • AMBA, ACE, AXI bus protocols
  • VHDL/Verilog/System Verilog
  • OVM/UVM, Class based verification methodologies
  • Formal verification methodologies, AVIP
  • test pattern debugging and testing for verification and automatic testers
  • Low Power intent verification using CPF, UPF
  • Scripting - PERL, Python, UNIX/LINUX
  • FPGA/Emulation/Prototyping using HAPS/Palladium/Zebu would be an additional advantage
  • Power management understanding
  • Functional, Code Coverage methodologies

R-10002709