Would you like to become part of a growing team developing silicon products for customers such as Microsoft, Google, Facebook and other cloud operators? Come join the team creating technology that fuels web2.0, mobile content, and cloud megadatacenters! These programs are at the leading edge in a series of high throughput Ethernet controllers that deliver unprecedented performance at critically important power efficiency.
We are looking for highly skilled and efficient Design Verification engineers that want to verify new designs that can evolve rapidly over the next several generations in a very dynamic market using industry proven constrained random methodologies with System Verilog and UVM. You can become a member of an extremely skilled and efficient group of engineers. Broadcom intends to provide a complete interconnect solution with Controller and associated switch products – with performance enhancements when using an all Broadcom solution. This architecture will scale from traditional x86 servers to an emerging microserver segment, and all the way to high core count ARM-based SoCs.
This is a rare opportunity to be part of an emerging product line, with market dominating products for a new line of devices. You will work with our worldwide design and architecture team, along with members of our Switch Team partners, to develop world class devices. All aspects of Design Verification, will be involved, along with opportunities for technical leadership.
Skills: Self motivated personality with a strong presence to do things right. Need to have strong sense of teamwork and ability to work well with other. Constrained random verification methodologies with experience driving completion via coverage closure. Preferable to have skills with SV and UVM, well versed in OOP
Tools/Languages: System Verilog (TB structures - Class, SVA, etc.), UVM, VCS, Incisive, Scripting skills a + (Python, Perl, ...)
Experience: Typically requires a minimum of 12+ years of related experience (or 10+MSEE).