Verification Development Engineer

5 - 7 years experience  •  Business Services

Salary depends on experience
Posted on 11/22/17
5 - 7 years experience
Business Services
Salary depends on experience
Posted on 11/22/17

As a Verification Development Engineer at Micron Technology Inc., you will work with a highly innovative and motivated verification development team using state of the art verification technologies to verify the most advanced DRAM products. The verification development you design and implement, will be used world-wide by multiple teams to verify DRAM products.

 

Responsibilities include, but not limited to:

 

  • Using advanced verification languages and techniques to build a cutting-edge verification platform
  • Participating in creating our full chip behavior model that is distributed to Micron’s world-wide external customer’s monthsbefore silicon is available
  • Participating in defining specification details in collaboration from BU, Design, PE and Verification
  • Designing and implementing verification tools to fully evaluate memory designs at chip or block level on functionality
  • Working closely with Micron's global design teams to contribute to the success of the design team by applying verification tools and techniques (critical for new memory architectures that are in the specification development phase)
  • Understand internal and external datasheets
  • Designing and implementing the test-bench infrastructure used by Micron’s world-wide teams to create verification flows
  • Understanding the functionality and timing requirements of the design
  • Building a verification plan, incorporating directed and random patterns that cover all features of a memory design
  • Working with international colleagues on developing new verification tools and flows to solve the verification difficulties
  • Working with cross-functional groups to define and develop DFT patterns


Successful Candidates will have the following, but not limited to:

 

  • Fluency in verification languages (System Verilog) and methodologies (UVM or equivalent) is required
  • Solid understanding of object oriented design
  • Ability to abstract complex technical details into an easy to understand interface
  • Good debugging and problem-solving skills
  • Experience in using scriptinglanguage to automate tasks
  • Strong communication skills with the ability to convey complex technical concepts to other verification peers
  • Experience defining coverage strategy and writing coverage model is a plus
  • Must possess good communication skills and ability to work well in a team
  • Previous work experience in DRAM memory related fields is a plus

 

Education:

A Bachelor’s in ElectricalEngineering, Computer Engineering, or equivalent required and 5+ years of experience.


We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law.  This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.


Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.

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