Ultra Low Power Machine Learning ASIC Verification Engineer in San Diego, CA

$100K - $150K(Ladders Estimates)

Qualcomm Incorporated   •  

San Diego, CA 92101

Industry: Telecommunications & Hardware

  •  

5 - 7 years

Posted 24 days ago

Qualcomm is looking for an experienced digital designer to lead the development of digital subsystem for ultra-low power machine learning ASIC for deep learning tasks. You will work with exposure to various aspects of state of the art machine learning chip development for quantized neural network models. You will lead the development of digital architecture, RTL design and debug.

You will also have chance working on our next generation fingerprint sensor that embodies cutting edge technology to capture fingerprints using ultrasound waves. This technology allows phones to place fingerprint sensors underneath the display, which allows for larger screen sizes.

Define testbench infrastructure using System Verilog, UVM and Formal. Responsible for complete chip level verification.

Experienced in DSP (signal processing blocks), AHB, SPI, ARM programming and mix signal simulation is a big plus. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in.

Qualcomm is looking for an experienced digital designer to lead the development of digital subsystem for ultra-low power machine learning ASIC for deep learning tasks. You will work with exposure to various aspects of state of the art machine learning chip development for quantized neural network models. You will lead the development of digital architecture, RTL design and debug.

You will also have chance working on our next generation fingerprint sensor that embodies cutting edge technology to capture fingerprints using ultrasound waves. This technology allows phones to place fingerprint sensors underneath the display, which allows for larger screen sizes.

Define testbench infrastructure using System Verilog, UVM and Formal. Responsible for complete chip level verification.

Experienced in DSP (signal processing blocks), AHB, SPI, ARM programming and mix signal simulation is a big plus.




All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.


Minimum Qualifications


Bachelor's degree in Science, Engineering, or related field.

5+ years ASIC design, verification, or related work experience.

Bachelor's degree in Science, Engineering, or related field.

5+ years ASIC design, verification, or related work experience.


Preferred Qualifications


UVM based verification flow.

Be able to setup verification strategies based on directed and random testing.

Code and functional coverage-driven verification.

Past experience of successfully technically leading complex, DSP-heavy design verification at SoC level or IP level.

Experience with the following areas in design and verification: DSP/Memory sub-system, DMA, HW accelerators, AHB, SPI Interface verification experience; Pre-silicon functional verification using ARM processor;

Experience with DSP/Memory subsystem architectural level verification and HW accelerator workload characterization a plus

Experience with low power in-memory and near-memory computing a plus

UVM based verification flow.

Be able to setup verification strategies based on directed and random testing.

Code and functional coverage-driven verification.

Past experience of successfully technically leading complex, DSP-heavy design verification at SoC level or IP level.

Experience with the following areas in design and verification: DSP/Memory sub-system, DMA, HW accelerators, AHB, SPI Interface verification experience; Pre-silicon functional verification using ARM processor;

Experience with DSP/Memory subsystem architectural level verification and HW accelerator workload characterization a plus

Experience with low power in-memory and near-memory computing a plus


Education Requirements


Preferred: Master's, Computer Science and/or Electrical Engineering Required: Bachelor's, Science, Engineering, or related field.

Preferred: Master's, Computer Science and/or Electrical Engineering


Keywords

Valid Through: 2019-10-17