• Work with the Architecture team as a design-team leader or member, to shape the micro-architecture of the chip.
• Write specifications for the relevant block, micro-architecture of one or more block
• Implement a specification using RTL coding techniques and best practices
• Contribute to and coordinate synthesis, place and route, and timing signoff.
• Work with the Verification team on pre-silicon verification tasks such as reviewing the verification test plan, coverage analysis, and full-chip simulation plus debug.
• Work with the post-silicon validation teams in qualifying the device for production
• Provide technical guidance and mentoring to junior engineers
• Engineering degree required with 10+ years of experience in RTL design of submicron SOC products (eg: Microprocessor based SOC's).
• Experience in Micro-architecture for the complex Custom/ASIC products focusing in any one/more areas: NPU, Embedded Processors, DSP, Graphics or Cryptography.
• Significant hand-on experience with high speed (>1 GHz)/high-performance, pipelined RTL design, synthesis, static-timing closure, formal verification, gate-level simulations and block-level function verification.
• Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
• Effective interpersonal, teamwork, and communication skills; able to interface internally and externally with all levels of the organization.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.