San Jose Lab is a highly innovative R&D group developing state-of-the-art high-value solutions for LG Electronics business units and CTO division. Our R&D scope is broad and strategic, covering chips and systems for deployment in next 2-5 years. We are currently focused on developing neural engines to accelerate deep neural networks for LG’s diverse products including for cars, smart image sensors for next-generation cameras and lightweight, privacy-preserving, scalable post-quantum security for Intelligent Internet-of-Things including cars. Our project teams typically consist of experienced experts who collaborate with other experts and engineers, both within and outside of LGE. We are always looking for innovative, energetic and passionate team players with strong sense of self confidence and respect.
You will be part of the core team developing neural engines for processing image/video, audio/sound and natural language processing to enable more convenient man-machine interfaces for all of LGE’s products and services as well as ever more intelligent robots. You will work with other architects to explore ways to enhance and optimize our current generation of neural architecture and designs to accelerate rapidly emerging Neural Network topologies. You will perform careful tradeoff analysis to reduce hardware complexity and power consumption while retaining current programming model. You will contribute to higher level architecture model written in C and work with micro-architects to help them design, build, and verify a family of RTL implementations. You will also work with the SDK team to define best mapping strategies for supported algorithm topologies.
Principal Duties and Responsibilities • Design software interfaces for the neural engine and maintain neural engine architecture spec • Evaluate architecture in terms of performance, power consumption, area, complexity and flexibility against emerging DNN algorithms • Enhance architecture simulator for software porting, debugging, performance optimization and hardware reference checking • Manage FPGA bring-up firmware for prototyping and demos
Job Requirements • Bachelor's Degree +5 years of related experience; or a Master’s degree and 3+ years’ experience; or a PhD without experience; or equivalent work experience. • Ability to understand, develop, and implement complex algorithms on highly parallel hardware structures. • Thorough understanding of Neural Networks, CNNs, RNNs, LSTMs and sensor fusion. Understanding of attention models, GANs, and reinforcement learning a plus. • Hands on coding with C/C++, Python. • Practical hands on experience in one or more deep learning platforms including Caffe, Caffe2, Tensorflow, MXNet, OpenCV 3.3 preferred.