AEye develops advanced vision hardware, software and algorithms that act as the eyes and visual cortex of autonomous vehicles. Since its demonstration of its solid state LiDAR scanner in 2013, AEye has pioneered breakthroughs in intelligent sensing. The company is based in the San Francisco Bay Area, and backed by world-renowned investors such as Kleiner Perkins, Intel, Airbus and more.
Tasks, Duties & Responsibilities:
- Participate in product and architecture definition as pertains to implementation with FPGA.] replaced by:
- Productization of Aeye's next generation of lidars as pertains to implementation with FPGA
- Detailed design implementation - all phases of development; component/technology selection, simulation, implementation, verification
- Create and maintain engineering documentation (including for DFMEA, APQP / PPAP processes)
- Support NPI team in transitioning production to CM
- Other duties and responsibilities as assigned.
Essential Skill & Experience Requirements (required):
- BS or MS in Electrical and/or Computer Engineering.
- Industry experience in specific FPGA platform product design
- Track record of product release in automotive industry following APQP/ PPAP process
- FPGA Design; Verilog, SystemVerilog and/or VHDL (tools experience: Xilinx, Altera, Modelsim, etc)
- Simulation and in-system bring-up & debug skills.
- Good communication & collaboration skills.
- Able to produce quality documentation for both internal & external target audiences.
- Ability to work in a fast-paced and demanding start-up atmosphere.
Preferred Skills & Experience (useful):
- Experience with production transfer to CM
- Experience with Xilinx Zynq architecture and Vivado Design Suite.
- Good technical grasp of DSP implementation in FPGA.
- Digital Filtering, (Sampled) Signal Conditioning, Math Operations.
- Modeling and Simulation of DSP algorithms in higher level tools such as ModelSim, Matlab, etc.
- Feedback Control Loops.
- Strong knowledge of and experience in:
- uProcessors; memory and peripheral subsystems (associated protocols).
- Interconnect & Communication (PCIe, USB, Ethernet MAC).
- FPGA ARM Core & AXI Bus.
- Experience with Camera design.
- Experience designing with Xilinx Image sensor pipeline and Xilinx IP.
- Working knowledge of camera image sensors and controls.
- Experience with Xilinx memory controller (MIG), video DMA and video frame buffer IP.
- Real-world "cradle-to-grave" product development and support experience; design for manufacturability, design for test, mature product support.
- Experience in a fast-paced and demanding start-up experience.