In this role, you will lead a team to develop and design leading edge CMOS image sensor.
- Participate in chip level architecture definition, including ISP datapath, power, performance and area trade-offs.
- Work with back-end team closely in floorplanning, timing closure, and DFT.
- Full-chip integration and verification.
- CMOS image sensor array/analog related timing control design and verification.
- Chip bring-up, validation, and debugging.
- Customer and application engineer (AE) support.
- Extensive knowledge of all aspects of chip development: from design specification, architecture define, low-power design, tape-out, chip validation, chip debugging, mass production, to customer support.
- In-depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT.
- Extensive knowledge of peripheral interface: MIPI, USB, I2C, SPI.
- Experience in design verification and modeling using System Verilog, System C, C++, Python, Perl programming language.
- Extensive knowledge of CMOS Image Sensor and image signal processing algorithm and h/w design.
- Extensive knowledge of RISC and video processing.
- Minimum MSEE + 6 years or BSEE + 8years of digital design experience