$80K — $100K *
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
This engineer will utilize their technical expertise to assist in the design of AMD’s next-generation CPU microprocessors.
They will maintain and enhance existing RTL designs related to cache DFT features such as MBIST. Work on related projects and/or assignments as needed, to meet team goals. Write detailed specifications for the RTL designs, develop quality, timely and cost-effective solutions independently. Write and maintain design to meet timing, area and power goals set for the project. Be involved in all phases of the project from specification to working with silicon validation teams.
A successful person in this role would possess good written and communication skills and would be able to work in a collaborative team environment working architects, verification, physical-design and silicon validation teams. At this level, they would need to demonstrate leadership qualities and have excellent time management skills.
• Collaborate with a dedicated team of engineers to define and implement DFT microarchitecture for AMD CPUs.
• Reliably deliver a design from concept through tape-out by innovating through complex and challenging requirements.
• Identify customer challenges and insert a compelling AMD value proposition to address challenges.
• Write and maintain detailed specifications for the verification team members to use.
• Write and maintain external specifications for product and test teams to use.
• Work closely with the Physical Design team members to drive design closure using experience with Static Timing, CDC/Gate CDC, and Static Power analysis tools and flows.
• Work with product test teams during test bring up phase of the product.
• Make technical contributions and innovations that enable high performance, high frequency, and power efficiency on the Caches of our server, desktop, and laptop CPUs.
• Debug logic, electrical and firmware issues found in silicon debug utilizing silicon debug tools and techniques.
• Strong logic design skills using Verilog HDL.
• Strong understanding of DFT concepts in areas of MBIST (Memory Built In Self Test) and other related DFT techniques for memory arrays.
• Proficiency with Verilog HDL.
• Proficiency with programming and scripting skills.
• Understanding of modern CPU architecture - prior experience designing shared cache, last level cache and related IPs, out-of-order execution units or Floating-Point data-paths and control a plus.
• Eagerness to learn and grow as a CPU DFT design engineer.
• Collaborate effectively towards the success of the project by working closely with logic design, physical design and silicon validation teammates across the wider organization.
• Demonstrate a responsive track record of engaging with a diverse set of teams and across a broad set of technical areas to facilitate design delivery.
• Prior knowledge of formal verification tools and techniques a plus
BS w/ 3+ yrs, MS w/ 2+ yrs, PhD in EE/CE
Valid through: 3/15/2021