Sr. Design Verification Engineer - CSM
- Job Number: 54243756
- Santa Clara Valley, California, United States
- Posted: 13-Sep-2017
- Weekly Hours: 40.00
The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, iPod, and AppleTV. Apple is looking for a world-class design verification leader to work with cross-functional teams and external vendors to define, develop and productize the next generation of devices.
- Advanced knowledge of SOC/Display/Audio & System architecture/design & in-depth knowledge of the state of the art verification flow.
- Experience with low-level programming in C/C++/assembly.
- Familiarity with verification environments, VMM, System Verilog is a plus.
- Knowledge of industry standard interfaces, good understanding of Verilog, Verilog simulator and debug.
- Clear understanding of constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy.
- Knowledge of Formal verification, Hardware acceleration all a plus.
- Should be a team player with excellent communication skills and the desire to take on diverse challenges.
•You will be responsible for ensuring the quality of the chip & are expected to: •Work closely with internal & external teams to review specifications, improve DV plans & methodologies, and ensure full test coverage. •Work closely with design & micro-architecture teams to understand the functional & performance goals of the design. •Stay abreast with design specs, conduct detailed test plan reviews, and assess vendor DV capabilities and convergence. •Have strong communication skills, team-oriented approaches, and excellent cross-functional capabilities. •Support gate level functional verification, run regressions, manage bug tracking, analyze code & functional coverage,etc.
•BSEE / MSEE or MSCE with industry experience over 7 years.
Some travel required.