Senior / Staff SoC RTL Logic Design Engineer (Verilog or SystemVerilog)

Encore Semi   •  

San Jose, CA

Not Specified years

Posted 265 days ago

This job is no longer available.

Summary:

Join the growing Encore Semi Front-End Development team to collaborate with customers to design, verify and enable system level development for current and next generation ARM-based SOCs.  You would join a team delivering on many facets of the logic design of these SOCs including RTL / Microarchitecture Development, Extending Verification using Functional Coverage, Enabling Emulation Environments for intense Verification and to enable FW development and Enabling FPGA Prototyping of the design.

Essential Duties/Responsibilities/Functions/Tasks:

As a member of an ARM-based SOC development team, own the RTL / Logic Design of various control logic blocks.  You will be responsible for starting with a high-level architecture specification for a block of an SOC and creating the microarchitecture specification and coding the RTL for that block.  You would work closely with the Verification team to guide their testing of the logic as well as debugging and fixing failures and you would work with the synthesis team to reflect into the RTL feedback from the physical design.

Minimum Qualifications:

• Experience with RTL / Logic Design of control logic blocks using Verilog or System Verilog.
• Experience designing the microarchitecture of units of an SOC from a high-level architecture specification.
• Experience working with Design Verification teams to provide feedback on their Verification and Coverage plans as well as providing debug assistance.
• Experience working with Synthesis and Physical Design engineers so that inputs and constraints from those domains can be efficiently incorporated into the RTL implementation.
• Experience as part of an ARM-based SOC Development team.

Preferred Qualifications:

• Experience with synthesis including running synthesis tools as well as modifying the RTL based on the feedback.
• Experience designing control blocks to connect to mixed-signal units.
• Experience with RTL / Logic development related to ARM core subsystems and SSD storage controllers.

Education Requirements:

• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering