Senior / Staff SoC Design Verification Engineer

Encore Semi   •  

San Jose, CA

Not Specified years

Posted 270 days ago

This job is no longer available.

Join the growing Encore Semi Front-End Development team to collaborate with customers to design, verify and enable system level development for current and next generation ARM-based SOCs.  You would join a team delivering on many facets of the logic design of these SOCs including RTL / Microarchitecture Development, Extending Verification using Functional Coverage, Enabling Emulation Environments for intense Verification and to enable FW development and Enabling FPGA Prototyping of the design.
Essential Duties/Responsibilities/Functions/Tasks:
As a member of an ARM-based SOC development team, own and drive Functional Verification at the SOC level.  You will be responsible for setting the direction of the Verification of control logic for the SOC and establishing a strong functional coverage-based verification environment and methodology.  If you have experience doing Functional Verification of SOCs or Unit with a heavy control logic focus and merging Functional Coverage with Directed Random Testing, joining the Encore Semi Verification team could be for you.
Minimum Qualifications:
• Experience with Functional (Design) Verification at the SOC or “full-chip” level using simulation models.
• Experience specifying Functional Coverage (using environments such as SV/UVM), using various testing techniques (especially directed random testing) to drive higher levels of coverage, and experience analyzing Functional Coverage results to either improve verification (testing) efficiency and to deliver highly functional designs.
• Verification experience focused at control-centric IPs or Units as part of a larger SOC or top level, “full-chip” SOC Verification.
• Experience as part of an ARM-based SOC Verification / Development team.
Preferred Qualifications:
• Verification experience for SOC microcontrollers in general or controllers for storage systems would be a plus.
• Experience developing Verification methodologies or environments incorporating various levels of coverage but most importantly functional coverage (as opposed to code or statement coverage).
• Experience shifting Functional Verification from Simulation to Hardware Emulation environments.
Education Requirements:
• Required: Bachelor's, Electrical Engineering
• Preferred: Master's, Electrical Engineering