$150K - $200K(Ladders Estimates)
The Infrastructure Processor group within Marvell develops cutting-edge SOCs and processors in advanced process nodes for the largest telecommunications companies in the world. We develop the Octeon, Octeon-Fusion, and Armada chips for growing markets in exciting product segments. We are looking for motivated candidates who seek opportunities for professional growth and the chance to work in a dynamic organization with a world-class team in our Boise Design Center.
We are looking for a manager to manage a team developing industry-leading, optimized IC solutions. Responsibilities include the management of engineers as well as project management and program management tasks, including all aspect of post-silicon verification, validation, and characterization. We seek someone with proven experience in leading people and who has provided technical guidance on previous projects.
In this role you will directly manage the activities of one or more small teams. You will provide leadership to other managers, supervisors, and engineers and will be accountable for the performance and results of multiple related units.
In this position you will secure the necessary resources (screens, recruits, contractors, hires) to achieve objectives and allocate resources to optimize capability within budget. You will make decisions for talent management activities including hiring, assessing, rewarding, retaining and developing employees.
• 10+ years of field experience
• Bachelor's degree in Electrical Engineering, Computer Engineering or related fields
• Excellent written and verbal communication skills
• Excellent analytical problem solving skills
• Ability to work collaboratively in a team environment
• Understanding of CPU Architecture and Computer Systems Design
• Ability to work across disciplines and manage time across several demands
• 15+ years of field experience
• Master's degree and/or PhD in Electrical Engineering, Computer Engineering or related fields
• Experience with high-speed SerDes transmitter and receiver technologies and equalization techniques
• Experience with C/++ programming, Linux, device drivers, and/or embedded software
• Experience with scripting and workflow automation
• Experience with compliance measurements for SATA, PCIe3, USB, GigE, and DDR4 buses.
• Understanding of board level passive channel design solutions for 20GHz+ SERDES circuits.
• Familiarity with power distribution network impedance simulation and measurement
• Experience with performance benchmarking, measurement and debug.
• Experience of hands-on testing and validation of I/Os across PVT
Valid Through: 2019-10-3