Join the growing Encore Semi Front-End Development team to collaborate with customers to design, verify and enable system level development for current and next generation SOCs. You would join a team delivering on many facets of the logic design of these SOCs including RTL / Microarchitecture Development, Functional Verification using Simulation platforms, and Enabling Hardware Emulation Environments for intense Verification.
As a member of an Application Processor SOC development team, dive into creating and maintaining the build flows for HW Emulation platforms based on existing RTL models as well as the verification models connected to that platform. Develop new elements of the Verification environment such as Bus Functional Models or Transactors to enable testing using the HW Emulation models.
• Experience with Hardware Emulation systems such as ZeBu, Palladium and/or Veloce
• Experience enabling the building RTL models primarily used for simulation for Hardware Emulation. This includes experience with the build tools associated with the Emulation Platforms as well as the changes required to the RTL modeling itself to efficiently leverage the platforms resources and enable the best emulation speed
• Experience enabling Verification Test Environments for Hardware Emulators. The starting point would be UVM-based simulation test environments and includes creating appropriate bus functional models and transactors to enable verification to move from simulation to emulation in a seamless manner
• Experience dealing with IPs in a Hardware Emulation environment. This includes IP modeling for emulation for SOC IPs such as analog blocks and incorporating and translating 3rd party IPs (RTL and Verification Environment) into SOC Hardware Emulators
• Familiarity with how Hardware Emulation can accelerate Verification especially in terms of achieving Verification acceleration and functional coverage goals
• Experience in Automation and Scripting for the creation of Hardware Emulation models based on full-SOC RTL. Experience debugging failures from regression or verification tests run on Hardware Emulation models
• Bachelor's, Electrical Engineering
• Design Verification experience of full-chip SOCs either using Simulation or Hardware Emulation
• Experience automating Hardware Emulation build flows to build new models quickly as the design changes during development
• Master's, Electrical Engineering