Senior Package Design Engineer at SiTime Corporation in Santa Clara, CA

The Senior Package Design Engineer is responsible for the R&D, design, and qualification of unique custom packaging technology for SiTime’s revolutionary MEMS-based timing products. Responsibilities include new package technology development, packaging materials research and characterization, process development and optimization, simulation and design (including thermal, electrical, electromagnetic, mechanical, stress), package qualification and release-to-production. In addition, he/she will be responsible for managing local and overseas vendors in new package development activities including DoEs (Design-of-Experiments). The Senior Package Design Engineer will have a highly visible role within the company, working cross-functionally to ensure system-level performance of SiTime’s ultra-stable timing products.

Responsibilities:

• Develop new packaging technology for SiTime’s MEMS-based timing solutions
• Lead new package development activities for new products
• Spearhead development of new packaging structures and technologies
• Identify new materials, develop material models and characterization methodologies
• Oversee thermal/electrical/electromagnetic/mechanical/stress simulation and design
• Manage development activities at OSATs
• Lead new package qualification and release-to-production activities
• Lead troubleshooting activities related to package design or performance

Required Attributes:

• MS or PhD in Mechanical Engineering, Material Science, or equivalent science field
• 5+ years of experience in semiconductor IC packaging
• Understanding of semiconductor packaging materials, such as epoxies, polymers, and solders
• Experience with mechanical and thermal simulation and design
• Hands-on experience with CAD software (AutoCAD preferred but not required)
• Experience developing and managing Design of Experiments (DoE)
• Ability to manage cross-functional in-house resources, and manage overseas OSATs.