The Senior Digital ASIC/FPGA Design Engineer (Level 5) will be supporting The Boeing Company's Satellite Capabilities organization and multiple satellite product lines based in El Segundo, CA.
- Utilize high-level architectural documentation along with algorithm description and implement DSP functions for functions such as decimation, interpolation, general filtering, up-down conversion, digital beamforming, and channelization.
- Develop mathematical models in SystemVerilog to verify design implementation and develop and run scripts and Makefiles.
Boeing is the world's largest aerospace company and leading manufacturer of commercial airplanes and defense, space and security systems. We are engineers and technicians. Skilled scientists and thinkers. Bold innovators and dreamers. Join us, and you can build something better for yourself, for our customers and for the world.
Space and Launch
Relocation Assistance Available
Yes. Available for eligible candidates, if authorized.
- Experience in Digital ASIC design or FPGA verification.
- Experience with ASIC development including architectural definition, detailed design implementation using SystemVerilog, and functional verification using SystemVerilog.
- Experience with design architecture and detailed specification generation.
- Knowledge and competency of UVM.
- Thrive in working within a fast-paced environment and work well in a team of ASIC/FPGA engineers and Subsystem engineers.
- Demonstrated history of 1st pass success with ASIC/FPGA designs.
Typical Education and Experience
Degree and typical experience in engineering classification: Bachelor's 14 or more years' experience, Master's with 12 or more years' experience or PhD with 9 or more years' experience. Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry. ABET is the preferred, although not required, accreditation standard.