$150K - $200K(Ladders Estimates)
This position of "R&D Expert Engineer" is an ASIC Design, Implementation and Verification Engineer with experience in both back-end and front-end ASIC development flows whose mandate is to provide targeted support to mixed-signal DDR PHY semiconductor IP customers. The targeted customer support will include both pre-Sales and post-Sales support. Activities of customer support include such tasks as IP integration and implementation, design debug, silicon bring-up, and silicon testing. When not actively supporting customers, the candidate will participate in design, verification, silicon testing, documentation, or other related tasks as may be assigned by the Manager. The successful candidate will exercise skills in a variety of areas including but not limited to RTL coding, test bench and test case development, linting, synthesis, STA, place & route, DRC/LVS, silicon debug, and documentation. The emphasis for the current opening is "Front-End" activities including RTL development and Behavioral/GLS Verification related to our DDR PHY products. Experience with DDR protocols is a definite asset but not mandatory. This position requires extensive interaction with customers, including periodic international travel to assist customers at their sites.
Valid Through: 2019-10-18