Join our multi-disciplinary team at our new Rochester site, where your contribution will play a key role in further strengthening our product portfolio and supporting our growth strategy within key market segments for CMOS Image Sensing Solutions.
As principal digital design engineer you will define architectures of the image sensor (digital part) and building block specifications.
You will also: Implement RTL code
Create and execute verification plans/Testbench design (in cooperation with dedicated verification engineer).
Execute synthesis, P&R tasks or drive and follow-up these tasks done externally.
Support the silicon validation and production test (DFT).
Contribute to design methodology initiatives.
Prepare and report technical progress to project manager and customer.
Your education and experiences
Minimum Bachelors Degree in EE, ECE, CS or related field.
10+ years of experience in digital design with 3+ years of experience with ASIC architectural design and taking technical leader role.
Experience with synthesis and Place & Route for ASIC (timing constraints, timing closure and EDA tools).