Principal Analog Design Engineer

11 - 15 years experience  •  Semiconductors

Salary depends on experience
Posted on 02/21/18
San Jose, CA
11 - 15 years experience
Semiconductors
Salary depends on experience
Posted on 02/21/18

Description

  • Principal analog/mixed-signal technical lead/architect with hands-on designexperience in specifying, architecting, and developing high-speed Memory IO interface in deep sub-micron CMOS technologies.

  • Collaborate with system architects and lead designers to work on the chip architecture and develop efficient architectures and designs for future Memory IO interface operating at multiple Gbps.

  • Support cross-functional engineering teams for system validation and mass production approval

  • Ensure designs are properly verified, validated, and tested for long-term reliability

 

Qualification

  • 10+ years of experience architecting and developing Memory IO interface IP.

  • Deep understanding and hands-on designexperience of Memory IO interface transmitter and receiver architecture and key blocks such as receiver front-ends, equalizers (FIR, DFE), serializers/deserializers, PLL, CDR, and equalization algorithms are required. Understanding and designexperience of ADC, DAC LDO, bandgap are plus.

  • Experience developing Memory IO interface block/sub-system spec and architecture. Good understanding of signal integrity issues in high-speed links.

  • Strong experience on analog mixed-signal simulation, tools and Matlab modeling at the chip level

  • Experience working as a design lead in a team environment on mixed signal ICs and integrating SerDes, DDR PHY or analog mixed-signal chip

  • Good experience taking projects from the concept phase through chip architecture, writing electrical specifications, process technology selection, die size estimation, managing schedules, IC design, layout supervision, layout extraction and verification, signal and power integrity, ATE lab correlation, corner lot characterization analysis, hands-on lab evaluation, release to production, yield improvement, and failure analysis support

  • Knowledge of IC process technologies, reliabilitydesign rules, ESD and latch-up testing

  • Work experience with high volume manufacturing strongly preferred.

  • Capable of hands on, detail oriented tasks. Excellent analytical and problem solving skills.

  • Demonstrated leadership and teamwork skills, working across cross-functional teams.

    ID: 9140

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