MTS Design Verification Engineer

Advanced Micro Devices   •  

Santa Clara, CA

Not Specified years

Posted 176 days ago

This job is no longer available.

The Unified Memory Controller(UMC) is an IP that delivers into all SoCs that are shipped by AMD. We verify a highly configurable, flexible design that supports multiple DRAM technologies on the same codebase. 

We deliver to server, console, discrete graphics and low power SoC’s which involves supporting DDR4/LPDDR/GDDR5,6/HBM. There are many challenges as we continuously add features, refine our design and enhance our testbench to take on the next generation of projects 

 

As a verification team member, your responsibilities would include  

  • Drive debug and closure of regression signatures using waveform viewer and output files; and collaborate with the RTL designers and testbench owners to fix bugs.
  • Develop quality, timely and cost effective solutions independently. Contribute to testbench and/or IT infrastructure, helping to build a reliable, scalable, and flexible verification environment
  • Develop/Enhance UVM testbench components like test-cases, monitors, scoreboards, sequencers, and sequences for new features

 

Experience with Verilog, System Verilog, and Object-Oriented Programming expertise are a requirement

- Experience with UVM and Perl is preferred

- Requires strong Programming and debug skills.

- Experience with DRAM controllers and ddr phys is a plus. 

- Requires strong communication skills and the ability to work independently as well as in a cross-site team environment.

- Strong Computer Architecture knowledge

 

#LI-PS1

 



Requisition Number: 47049