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ESSENTIAL DUTIES AND RESPONSIBILITIES:
The engineer will work with architects and lead electrical engineers to ensure the signal integrity in system designs is adequate to meet system requirements. Responsibilities will include developing loss budgets, selecting critical components, specifying PCB materials, stack-ups, and structures, directing PCB layout, fully simulating designs, verifying them through hands on lab measurements, and resolving discrepancies between simulations and measurements. The SI engineer will be the final authority on deciding if a system design will meet signal integrity requirements with the process and component variations that will be encountered during mass production.
Specific activities will include:
- Developing system loss budgets that demonstrate design feasibility with margin
- Signal integrity simulations using s-parameter models of components & PCB structures
- Determining stack-ups, including controlled impedance trace structures, to meet signal integrity, power integrity and signal routing requirements
- Using 3-D modeling in the design of PCB structures such as high-speed signal vias and back-drilling for connectors.
- Advising design engineers on routing strategies and topologies and parts placement to assure optimal signal integrity.
- Developing test strategy to verify signal integrity with margin in actual systems.
- Overseeing signal integrity verification, ensuring testing is done properly, and evaluating results.
- Analyzing variations between simulations and test results and specifying design changes.
- Maintaining expertise on state of the art technologies and tools through meetings with component and PCB material suppliers, tool suppliers, and learning activities, such as conferences.
- Mentoring other engineers in signal integrity processes, techniques and best practices.
- BS or MS in Electrical Engineering
- At least 10 years experience as a dedicated signal integrity engineer, with expertise in PCBA design
- Expertise in high-speed signaling concepts applicable to current generations of PCIe, DDR, Ethernet and SAS/SATA bus architectures.
- Experience successfully designing high speed signaling structures run over long distances on PCBs
- Expert knowledge of the Mentor Hyperlynx SI modeling tools or equivalent modeling SW from another vendor. This should include both 2-D and 3-D modeling.
- Knowledge of industry best practices for assuring sufficient margin in design so that system will meet all signal integrity requirements over all variations in components and process encountered during mass production.
- Ability to do power/thermal integrity simulations and analysis is a plus