Not Specified years
Posted 239 days ago
Hardware Engineer Sr Staff - 938756
USA, CA, Sunnyvale
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Contribute in a team oriented centralized SI organization performing system signal integrity design with exposure
to new and different cutting edge technologies. Perform analysis and design and understand tradeoffs in designing
interconnect solutions ranging from chip to chip, board to board, backplane and chassis to chassis interconnect.
Perform channel margin analysis to provide design tradeoffs amongst package, board, connector. Develop serdes channel
simulation models and correlate to test structures. Correlate Tx and Rx serdes simulation models with measurements and
work with serdes vendors to improve model accuracy. Perform PCB timing analysis, work with board engineers and layout
designers to implement all SI rules, develop layout/SI checklists. Document SI rules. Perform SI DVT measurements on
boards and correlate simulations with DVT measurements. Document SI DVT measurements and correlation to simulations.
Good team player able to work with other SI engineers and managers across geography in a matrix organization.
Leverage designs from other SI engineers and share in learning of new designs with SI team.
Capable of presenting new work/concepts/analysis to SI team forums. Provide technical assessment of projects to SI management team.
Proficient with lab equipment such as oscilliscopes, Vector Network Analyzers, Time Domain Reflectometers, Spectrum Analyzers,
phase noise analyzers. Good lab debug skills a plus. Proficient with AMI serdes models, ADS, HSPICE, Allegro, Sigrity, Ansoft HFSS.
Good oral and written communication skills. Team player able to work with people across geography and in a matrix organization.
Capable of working on several projects simultaneously.