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Hardware Engineer – Circuit Design in Santa Clara, CA

Achronix Semiconductor

Santa Clara, CA 95050
5w ago
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specialty:

Electrical Engineering

experience:

Less than 5 years

Job Description

Primary Job Responsibilities

  • CMOS circuit design of different macros in the FPGA fabric (full-custom portion of the FPGA), including clock distribution in the fabric.
  • Track planning over the fabric, evaluating performance of various metals in the interconnect stack.
  • Timing, EM, and IR flows and methodologies for the fabric.
  • Library characterization of custom standard-cell library cells.
  • Assist in the physical design of fabric IP using industry-standard place-and-route tools (RTL to GDS).
  • Collaborate with other members of the team to optimize our physical design and verification methodologies.
  • Estimate power, performance, and area of RTL blocks both before and after physical implementation.
  • Develop design methodologies and guidelines for each process node.
  • Work closely with foundry employees on process development, customer support, EDA, reliability, test, and product qualification.
  • Develop automated
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Valid through: 2020-3-4

About Achronix Semiconductor

Total Jobs:
10
Total Experts:
1
Average Pay:
$112,000
Total value of jobs:
$1,120,000
% Masters:
50%
* Ladders Estimates