Graphics Validation Lead / Engineer

Salary depends on experience
Posted on 05/22/18
8 - 10 years experience
Professional, Scientific & Technical Services
Salary depends on experience
Posted on 05/22/18

 

Key Responsibilities include:

 

  • Pre-silicon test plan development, defining creative solutions, processes and emulation strategy to de-risk the IP bringup and all phases of post-silicon validation to meet aggressive ramp to production schedules.
  • Define the overall Graphics and related IPs functional validation and verification strategy. 
  • Drive technical innovation to enhance AMD’s capabilities in IP bringup/validation, including tool and script requirements, technical and procedural methodology enhancement, internal and cross-functional technical initiatives.
  • Provide technical leadership, guidance for IP issue debug found during pre-silicon, bringup, all post-silicon validation phases, and ramp to production for a SoC program.
  • Work closely supporting teams in design, diagnostics, emulation, firmware, tools and driver to ensure readiness for first silicon arrival, enablement of IP functionality, and provide leadership amongst interdisciplinary teams to debug and root cause critical observations.
  • Lead collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives.
  • Support customer observations as required by the customer support teams.
  • Interface with the SCBU customer and SCBU internal program leadership team (Vertical Core Team) representing the IP System Engineers (IPSE) and provide technical leadership throughout discussions with the customer/VCT in pre and post-silicon. 


Skills and Experience:

 

  • 8+ years of experience in digital logic, platform design, verification, IP/SoC bringup and post-silicon validation. 
  • Extensive experience with ASIC debug techniques and methodologies.
  • Experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
  • Extensive experience with board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization
  • Knowledge of physical and protocol levels of common high-speed interfaces an asset
  • Extensive knowledge GFX IP, Video encoder/decoder, Display IP, PCI-Express, IOMMU, Memory Controller, Security and Firmware an asset.
  • In-depth knowledge of PC architecture.
  • Must have excellent written and verbal communication skills.
  • Must excel in a dynamic team working environment
  • Leadership and mentoring skills a definite asset
  • Must be a self-starter, excellent leadership skills, critical thinking, exceptionally organized and ability to independently drive tasks to completion.
  • Ability to be flexible in terms of responsibilities to deliver on aggressive pre and post silicon goals and ramp to production. 
  • Extensive knowledge of Jira, PowerPoint, Word, Excel an asset. 
  • Bachelors or Masters Degree in Electrical or Computer Engineering

 

#LI-LM1

 



Requisition Number: 63721

Not the right job?
Join Ladders to find it.
With a free Ladders account, you can find the best jobs for you and be found by over 20,0000 recruiters.