Embedded Firmware / Hardware Design Engineer

Sandia National Laboratories   •  

Livermore, CA

Industry: Professional, Scientific & Technical Services


Not Specified years

Posted 44 days ago

We are seeking an R&D Embedded FW/HW Design Engineer to join a multidisciplinary team that is designing and developing advanced components, subsystems, and systems for national defense programs. General responsibilities for electrical engineers range from conceptual design, detailed design (a combination of analog, digital, embedded firmware, schematic capture, board layout), analysis, overseeing fabrication of hardware, defining and executing qualification/testing plans, field support, as well as project management. Successful candidates will work in a team environment with opportunities to acquire increasing levels of responsibility.

On any given day, you may be called on to:

  • Design analog front end signal conditioning circuits to prepare an analog input for digitization;
  • Programming of FPGAs or microcontrollers to collect/organize data from various ICs/sensors via any manner of serial/parallel communication protocols (e.g., SPI, I2C, USB, 8b10b) and disseminate that data in a multitude of ways (e.g., serial outputs such as USB, UART, NRZL, biphase);
  • Perform hands-on test and debug of circuitry;
  • Develop documentation of a given design and give technical presentations to peers/managers;
  • Design and develop specific manufacturing design requirements (i.e., PC board material, trace impedances, routing requirements, PC board stack-up, etc) and oversight of the manufacturing of PC boards;
  • Create software allowing customers to configure or download data from our embedded instrumentation systems, and view and analyze that data in novel ways;
  • Develop a system-level understanding of the collected data and support for anomaly resolution.

This position involves being a member of 3-10 person interdisciplinary design teams and supporting multiple programs/teams simultaneously. Travel to test facilities can be common feature of the job, depending on the program being supported, the job may require up to 25% travel.

Knowledge, Skills, and Abilities:

  • Technical knowledge and competencies appropriate to the position.
  • Thorough knowledge of and applied experience with scientific and engineering methods and with the discipline’s standards for the ethical conduct of research.
  • Thorough knowledge of and experience with designing, planning, and executing research, design, and development projects.
  • Demonstrated knowledge of and experience with implementing Sandia policies affecting research, design, and development activities, projects, or initiatives.
  • Demonstrated ability to team across disciplines.

Qualifications We Require

  • Bachelor’s degree in relevant discipline, or equivalent:
  • higher degree (MS, PhD) in relevant discipline; or
  • engineering or scientific experience and/or achievements that demonstrate the knowledge, skills and ability to perform independent research and development.
  • Ability to obtain and maintain a DOE Q security clearance.
  • Ability to travel.

Qualifications We Desire

  • Active DOE Q security clearance;
  • Demonstrated experience with circuit design and analysis;
  • Demonstrated experience with embedded firmware design (preferably VHDL) and testbed development;
  • Proven experience with design and analysis tools (e.g., Matlab and LabVIEW), analog simulation codes (e.g., LTSpice), and HDL simulation codes (e.g.,ModelSim);
  • Hands-on experience testing and de-bugging circuitry, with clear mastery of tools such as oscilloscopes, logic/network/spectrum analyzers, function/pulse generators, etc.;
  • Knowledge of and experience with PC-board layout tools (e.g., EAGLE PCB or Mentor Graphics), and PC-board fabrication and assembly design principals.
  • An obvious passion for engineering and building new things;
  • Strong communication skills (especially technical writing skills), interpersonal skills, and the ability to influence others;
  • Ability to juggle competing priorities and deadlines.