$80K — $100K *
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
Display IP Validation Engineer
The Display Controller team within the Radeon Technologies Group (RTG) is looking for an individual to participate in the design verification of the Display IP within the larger SOC context. The candidate would participate in a team of verification and design engineers, working closely with other team members to understand and verify the functionality of the design within the context of delivering the display IP to the SOC programs. The candidate would be responsible for carefully documenting and executing test plans consisting of directed and random tests to be run under simulation. Experience with hardware modeling, assertions, and UVM methods are valuable assets. It is also encouraged to adopt evolving verification methodologies used in the industry as well as develop custom techniques to functionally verify increasingly complex IP designs within ambitious, schedules.
Interest in developing custom verification tools and driving new test methodologies
Strong analytical skills and attention to detail
Excellent written and communication skills
Team player with proven leadership skills
Understand the architecture of the Display IP and functional blocks being tested, and external connections in the broader context of the SOC
Build SystemVerilog and/or C/C++ models and test sequence libraries for simulation
Port IP-level tests to SOC environment, and modify / debug as required
Compose news tests to ensure functional completeness
Integration of IP to larger SOC codeline
Run regressions suites, and test status reporting
Co-op/Internship demonstrating verification experience on large ASIC development projects or equivalent embedded programming experience an asset
Very strong background in C/C++/OOO coding techniques
Experience with Verilog and/or System Verilog
Experience working with Cadence NCSIM, Synopsys VCS or equivalent
Experience working with UVM, OVM or equivalent
Experience with scripting languages, Ruby/Python/Tcl/BASH/etc.
Working knowledge of UNIX/Linux operating systems and debug tools
Min. Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering
Requisition Number: 79195
Country: Canada State: Ontario City: Markham
Valid through: 9/2/2020