DFT Design Consultant in Sunnyvale, CA

$100K - $150K(Ladders Estimates)

Synopsys Inc   •  

Sunnyvale, CA 94086

Industry: Information Technology

  •  

8 - 10 years

Posted 54 days ago

Job description

Synopsys Professional Services (SPS) delivers tool, methodology, and design implementation expertise to enable leading edge customers to complete their most challenging IC design projects. Our customers range from industry leaders to start-ups and develop products for applications such as telecommunications, wireless, broadband, aerospace, and multimedia.

SPS Staff DFT consultants are expected to be experts in DFT architecture and implementation. They play a critical role in many aspects of our customers chip design process, including DFT methodology development, DFT planning & architecture, test insertion, ATPG pattern generation and post silicon test support. You will be responsible for assisting our customers in addressing their most challenging DFT issues using Synopsys' DFT technology.

As a Staff DFT consultant, you will work either as an individual contributor or as a project leader for the DFT function, depending on the size and scope of the project. Frequent interfacing with customers and management is required. In addition, Staff DFT consultants also contribute to enhancing the best practices of the DFT flow. Staff DFT consultants may be assigned to projects that range from turnkey design implementation projects done by SPS members off-site to joint design assistance projects where members of the SPS consulting team work closely with our customers design team members at the customer or SPS site. Staff DFT consultants may also participate in pre-sales planning and scoping of projects. Overall, Staff DFT consultants must excel in skill areas including DFT technical expertise, team work, customer focus, and communication.

Requirements: BS with 8 - 10 yrs relevant experience. MS with 7+ yrs relevant experience. Related Ph.D. with 5+yrs. Must have hands-on experience of complex DFT implementation (SCAN, Memory BIST, JTAG). Must also demonstrate intimate knowledge of the Synopsys tools used in the DFT flow (TetraMAX, DFTMAX, VCS, PrimeTime) or equivalent.

Valid Through: 2019-10-18