A Sr. Staff level IC Designer to join a top-notch Mobile Power IC (PMIC) Design Groups at Intersil's Milpitas, California Design Center. This Design Engineer will work on cutting edge power solutions for Mobile Application Processors (System on Chip, SOCs).
This design engineer will perform transistor level design of analog/power circuits for brand new and derivative complex power management chips that may include multiple power handling modules along with synthesized digital circuitry. The designer will interface with layout, verification, test, and Application engineers to successfully bring new products from initial concept through release to production. The designer will participate in discussions of technical issues, and other design aspects with internal teams and with customers, will draft documents to communicate with internal teams or customer teams.
Specifically, we are looking for a staff level IC Designer with experience in several aspects of high-efficiency power management. Recent designs in submicron processes and detailed understanding of layout tradeoffs are a must. Must be able to work in team environment and participate in design reviews. Having working knowledge of Mixed-Signal Cadence tools and parasitic parameter extraction is a plus. Analytical approach to problem solving is highly required. These are leading edge technology products and provide challenging learning opportunities. Knowledge of end-applications is a plus.
Must have design experience with several of the following: switching regulators modulators, switching regulator integrated PowerFet and drivers, LDOs, precision amplifiers, oscillators, bandgap references, switched-capacitor circuits, A/D-D/A data converters. Good communication skills required. Design experience in CMOS/BICMOS is required. Experience working with small geometry BCD processes is a plus.
Required Skills/Coursework Desired:
MS/PhD preferred, BSEE with 15+ years’, MSEE with 12+ years’, or PhD with 10+ years’ experience in Product Design.